DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 229

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
CH8
CH16
CH24
When a channel’s signaling data changes state, the respective bit in registers TR.RSINFO1–4 is set. An interrupt is
generated if the channel was also enabled as an interrupt source by setting the appropriate bit in TR.RSCSE1–4.
The bit remains set until read.
Register Name:
Register Description:
Register Address:
CH8
CH16
CH24
Setting any of the CH1–CH30 bits in the TR.RSCSE1–TR.RSCSE4 registers causes an interrupt when that
channel’s signaling data changes state.
(MSB)
(MSB)
CH7
CH15
CH23
CH7
CH15
CH23
DS33R41 Inverse-Multiplexing Ethernet Mapper with Quad Integrated T1/E1/J1 Transceivers
CH6
CH14
CH22
CH30
CH6
CH14
CH22
CH30
TR.RSINFO1, TR.RSINFO2, TR.RSINFO3, TR.RSINFO4
Receive Signaling Change-of-State Information
38h, 39h, 3Ah, 3Bh
TR.RSCSE1, TR.RSCSE2, TR.RSCSE3, TR.RSCSE4
Receive Signaling Change-of-State Interrupt Enable
3Ch, 3Dh, 3Eh, 3Fh
CH5
CH13
CH21
CH29
CH5
CH13
CH21
CH29
CH4
CH12
CH20
CH28
CH4
CH12
CH20
CH28
229 of 335
CH3
CH11
CH19
CH27
CH3
CH11
CH19
CH27
CH2
CH10
CH18
CH26
CH2
CH10
CH18
CH26
CH1
CH9
CH17
CH25
CH1
CH9
CH17
CH25
(LSB)
(LSB)
RSINFO1
RSINFO2
RSINFO3
RSINFO4
RSCSE1
RSCSE2
RSCSE3
RSCSE4