DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 227

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Transmit Time Slot 0 Pass-Through (TFPT)
Bit 6: Transmit Time Slot 16 Data Select (T16S). See Section
Bit 5: Transmit Unframed All Ones (TUA1)
Bit 4: Transmit International Bit Select (TSiS)
Bit 3: Transmit Signaling All Ones (TSA1)
Bit 2: Transmit HDB3 Enable (THDB3)
Bit 1: Transmit G.802 Enable (TG802). See Section
Bit 0: Transmit CRC4 Enable (TCRC4)
0 = FAS bits/Sa bits/remote alarm sourced internally from the TR.TAF and TR.TNAF registers
1 = FAS bits/Sa bits/remote alarm sourced from TSERI
0 = time slot 16 determined by the TR.SSIEx registers and the THSCS function in the TR.PCPR register
1 = source time slot 16 from TR.TS1 to TR.TS16 registers
0 = transmit data normally
1 = transmit an unframed all-ones code at TPOSO and TNEGO
0 = sample Si bits at TSERI pin
1 = source Si bits from TR.TAF and TR.TNAF registers (in this mode, TR.E1TCR1.7 must be set to 0)
0 = normal operation
1 = force time slot 16 in every frame to all ones
0 = HDB3 disabled
1 = HDB3 enabled
0 = do not force TCHBLK high during bit 1 of time slot 26
1 = force TCHBLK high during bit 1 of time slot 26
0 = CRC4 disabled
1 = CRC4 enabled
TFPT
7
0
TR.E1TCR1
E1 Transmit Control Register 1
35h
T16S
6
0
TUA1
5
0
227 of 335
TSiS
10.10
4
0
for details.
10.10
TSA1
3
0
for details.
THDB3
2
0
TG802
1
0
TCRC4
0
0