SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 122

• Manufacturer Part Number: SAA7115HLBE
• Description: Video ICs ADV DGTL VIDEO DECODR
• Manufacturer: NXP Semiconductors

Specifications of SAA7115HLBE

• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 70 C
• Package / Case: SOT-407
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Resolution: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SAA7115HL/V1,557 SAF7115HLBE

PNX1300/01/02/11 Data Book
Figure 7-25. YUV 4:2:0 to YUV 4:2:2 co-sited conversion.
automatically by mirroring the first and last pixels of each
line. For example:
• Output pixel 1 uses input pixel 1 to generate its
Figure 7-26. 2x upscaling of Y pixels.
Figure 7-27. 2x upscaling of U and V with interspersed to co-sited conversion.
7-12
Output Pixels: YU’V’ 4:2:2
value. (same location, no filtering).
Input Pixels: YUV 4:2:0
Output Pixels: Y’U’V’
Output Pixels: Y’U’V’
Input Pixels: YUV
Input Pixels: YUV
Y0,0
PRELIMINARY SPECIFICATION
U0,0; V0,0
Y0,0; U0,0; V0,0
Upscaled Luminance Output Between
Input Pixels: Y’ = (-3,19,19,-3)/32 × Y
Co-sited Chrominance Output
U’,V’ = (–1,5,13,–1)/16×U,V
Co-sited Chrominance Output:
U’,V’ = (–1,5,13,–1)/16×U,V
Output Location Same
As Input Pixel: Y’U’V’ = YUV
Chrominance (U,V)
samples
Chrominance (U,V)
samples
Chrominance (U,V)
samples
• Output pixel 2 uses pixels 1,1, 2 and 3 to generate its
• Output pixel 3 uses pixel 2 to generate its value.
• Output pixel 4 pixel uses pixels 1, 2, 3 and 4, etc.
value.
Luminance
Co-sited Chrominance Output
U’,V’ = (–1,13,5,–1)/16×U,V
samples
Luminance
Upscaled Luminance Output Between
Luminance
Input Pixels: Y’ = (-3,19,19,-3)/32×Y
samples
samples
Upscaled Luminance Output Same
As Input Pixel: Y’ = Y
Upscaled Chrominance Output Between
Input Pixels: U’,V’ = (-3,19,19,-3)/32 × U,V
Philips Semiconductors
Y0
Y1
Y2
Y3
Y0, U0, V0
Y1, U0, V0
Y2, U2, V2
Y3, U2, V2
U0, V0
U2, V2