SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 333

• Manufacturer Part Number: SAA7115HLBE
• Description: Video ICs ADV DGTL VIDEO DECODR
• Manufacturer: NXP Semiconductors

Specifications of SAA7115HLBE

• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 70 C
• Package / Case: SOT-407
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Resolution: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SAA7115HL/V1,557 SAF7115HLBE

PNX1300/01/02/11 Data Book
dualasr
SYNTAX
FUNCTION
DESCRIPTION
unsigned shift amount, and the two 16-bit integers shifted right by this amount. The sign bits rsrc1<31> and rsrc1<15>
are replicated as needed within each 16-bit value from the left. If the rsrc2<31:4> value is not zero, then take this as a
shift by 16 or more, i.e. extend the sign bit into either result.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
A-35
r30 = 0x70087008, r40 = 0x1
r30 = 0x70087008, r40 = 0x2
r10 = 0, r30 = 0x70087008, r40 = 0x2
r10 = 1, r30 = 0x70084008, r40 = 0x4
r10 = 1, r30 = 0x800c800c, r40 = 0x4
r10 = 1, r30 = 0x700c700c, r40 = 0xf
r10 = 1, r30 = 0x700c800c, r40 = 0xf
r10 = 1, r30 = 0x800c700c, r40 = 0xf
r10 = 1, r30 = 0x800c700c, r40 = 0x10000000
r10 = 1, r30 = 0x800c700c, r40 = 0x10
rsrc1
The argument rsrc1 contains two 16-bit signed integers, rsrc1<31:16> and rsrc1<15:0>. Rsrc2 specifies an
The dualasr operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
[ IF rguard ] dualasr rsrc1 rsrc2 → rdest
if rguard then {
}
n <- rsrc2<3:0>
rdest<31:31-n> <- rsrc1<31>
rdest<30-n:16> <- rsrc1<30:16+n>
rdest<15:15-n> <- rsrc1<15>
rdest<14-n:0> <- rsrc1<14:n>
if rsrc2<31:4> != 0 {
}
31
rdest<31:16> <- rsrc1<31>
rdest<15:0> <- rsrc1<15>
S
Intermediate result
(example: n = 3)
Initial Values
PRELIMINARY SPECIFICATION
S
Right shifter
S
S
S
15
S
Lower 13 bits
rdest
S
31
S
S
S
28
dualasr r30 r40 -> r50
dualasr r30 r40 -> r50
IF r10 dualasr r30 r40 -> r50
IF r10 dualasr r30 r40 -> r50
IF r10 dualasr r30 r40 -> r50
IF r10 dualasr r30 r40 -> r50
IF r10 dualasr r30 r40 -> r50
IF r10 dualasr r30 r40 -> r50
IF r10 dualasr r30 r40 -> r50
IF r10 dualasr r30 r40 -> r50
Four LSBs of rsrc2
0
S
15
S
Operation
rsrc2
S
S
12
Intermediate result
(example: n = 3)
31
Dual-16 arithmetic shift right
S
Right shifter
S
S
S
0
asl asli asri lsl lsli lsr
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
Lower 13 bits
r50 <- 0x38043804
r50 <- 0x1c021c02
no change, since guard is false
r50 <- 0x07000400
r50 <- 0xf800f800
r50 <- 0x00000000
r50 <- 0x0000ffff
r50 <- 0xffff0000
r50 <- 0xffff0000
r50 <- 0xffff0000
n
Philips Semiconductors
lsri rol roli
ATTRIBUTES
SEE ALSO
Four LSBs of rsrc2
Result
shifter
102
1,2
No
0
2
1
-