SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 326

Video ICs ADV DGTL VIDEO DECODR

SAA7115HLBE

Manufacturer Part Number
SAA7115HLBE
Description
Video ICs ADV DGTL VIDEO DECODR
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7115HLBE

Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 70 C
Package / Case
SOT-407
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
2
Resolution
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SAA7115HL/V1,557 SAF7115HLBE
Philips Semiconductors
Dual clipped subtract of signed 16-bit halfwords
SYNTAX
FUNCTION
DESCRIPTION
two pairs of high and low 16-bit halfwords of rsrc1 and rsrc2. Both differences are clipped into the range [2
(or [0x7fff..0x8000]) and written into the corresponding halfwords of rdest. All values are signed 16-bit integers.
the modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
r30 = 0x12340032, r40 = 0x00010002
r10 = 0, r30 = 0x12340032, r40 = 0x00010002
r20 = 1, r30 = 0x12340032, r40 = 0x00010002
r50 = 0x80000001, r80 = 0x00018001
r110 = 0x00018001, r120 = 0x80010002
As shown below, the
The
[ IF rguard ] dspidualsub rsrc1 rsrc2 → rdest
if rguard then {
}
rsrc1
temp1 ← sign_ext16to32(rsrc1<15:0>) – sign_ext16to32(rsrc2<15:0>)
temp2 ← sign_ext16to32(rsrc1<31:16>) – sign_ext16to32(rsrc2<31:16>)
if temp1 < 0xffff8000 then temp1 ← 0x8000
if temp2 < 0xffff8000 then temp2 ← 0x8000
if temp1 > 0x7fff then temp1 ← 0x7fff
if temp2 > 0x7fff then temp2 ← 0x7fff
rdest<31:16> ← temp2<15:0>
rdest<15:0> ← temp1<15:0>
dspidualsub
31
17-bit signed differences
signed
Initial Values
Two full-precision
dspidualsub
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls
15
rdest
17
31
signed
Clip to [2
operation computes two 16-bit clipped, signed differences separately on the
signed
dspidualsub r30 r40 → r60
IF r10 dspidualsub r30 r40 → r70
IF r20 dspidualsub r30 r40 → r100
dspidualsub r50 r80 → r90
dspidualsub r110 r120 → r125
15
signed
–1..–2
0
15
]
0
15
17
PRELIMINARY SPECIFICATION
rsrc2
Operation
Clip to [2
31
signed
signed
PNX1300/01/02/11 DSPCPU Operations
15
–1..–2
signed
15
]
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
0
dspidualabs dspidualadd
dspidualmul dspiabs
15
dspidualsub
ATTRIBUTES
r60 ← 0x12330030
no change, since guard is
false
r100 ← 0x12330030
r90 ← 0x80007fff
r125 ← 0x7fff8000
SEE ALSO
signed
Result
15
dspalu
–1..–2
1, 3
No
71
0
2
2
A-28
15
]

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