MT46H8M32LFB5-6 IT:H Micron Technology Inc, MT46H8M32LFB5-6 IT:H Datasheet - Page 37

• Manufacturer Part Number: MT46H8M32LFB5-6 IT:H
• Description: DRAM Chip DDR SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H8M32LFB5-6 IT:H

• Density: 256 Mb
• Maximum Clock Rate: 166 MHz
• Package: 90VFBGA
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 1.8 V
• Maximum Random Access Time: 6.5|5 ns
• Operating Temperature: -40 to 85 °C
• Organization: 8Mx32
• Address Bus: 14b
• Access Time (max): 6.5/5ns
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 120mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Figure 11: WRITE Command
PRECHARGE
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. H 11/09 EN
Note:
BA0, BA1
The PRECHARGE command is used to deactivate the open row in a particular bank or
the open row in all banks. The bank(s) will be available for a subsequent row access a
specified time (
whether one or all banks will be precharged, and in the case where only one bank is
precharged, inputs BA0 and BA1 select the bank. Otherwise, BA0 and BA1 are treated as
“Don’t Care.” After a bank has been precharged, it is in the idle state and must be activa-
ted prior to any READ or WRITE commands being issued to that bank.
Address
1. EN AP = enable auto precharge; DIS AP = disable auto precharge.
RAS#
CAS#
WE#
CK#
CKE
A10
CS#
CK
HIGH
t
RP) after the PRECHARGE command is issued. Input A10 determines
Column
DIS AP
EN AP
Bank
Don’t Care
37
256Mb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©2008 Micron Technology, Inc. All rights reserved.
Commands