MT46H8M32LFB5-6 IT:H Micron Technology Inc, MT46H8M32LFB5-6 IT:H Datasheet - Page 74

DRAM Chip DDR SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray

MT46H8M32LFB5-6 IT:H

Manufacturer Part Number
MT46H8M32LFB5-6 IT:H
Description
DRAM Chip DDR SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46H8M32LFB5-6 IT:H

Density
256 Mb
Maximum Clock Rate
166 MHz
Package
90VFBGA
Address Bus Width
14 Bit
Operating Supply Voltage
1.8 V
Maximum Random Access Time
6.5|5 ns
Operating Temperature
-40 to 85 °C
Organization
8Mx32
Address Bus
14b
Access Time (max)
6.5/5ns
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
120mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
Figure 37: Random WRITE Cycles
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. H 11/09 EN
Command
Address
DQ
DQS
CK#
DM
CK
3,4
Notes:
WRITE
Bank,
Col b
T0
1,2
1. Each WRITE command can be to any bank.
2. Programmed BL = 2, 4, 8, or 16 in cases shown.
3. D
4. b' (or x, n, a, g) = the next data-in following D
t
DQSS (NOM)
med burst order.
IN
b (or x, n, a, g) = data-in for column b (or x, n, q, g).
WRITE
Bank,
Col x
D
T1
IN
1,2
T1n
D
IN
WRITE
Bank,
Col n
T2
D
IN
1,2
74
T2n
D
IN
256Mb: x16, x32 Mobile LPDDR SDRAM
WRITE
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Bank,
Col a
T3
D
IN
1,2
T3n
D
Don’t Care
IN
IN
b (x, n, a, g) according to the program-
WRITE
Bank,
Col g
T4
D
IN
1,2
T4n
D
IN
Transitioning Data
©2008 Micron Technology, Inc. All rights reserved.
WRITE Operation
NOP
D
T5
IN
T5n
D
IN

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