MT46H8M32LFB5-6 IT:H Micron Technology Inc, MT46H8M32LFB5-6 IT:H Datasheet - Page 71

DRAM Chip DDR SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray

MT46H8M32LFB5-6 IT:H

Manufacturer Part Number
MT46H8M32LFB5-6 IT:H
Description
DRAM Chip DDR SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46H8M32LFB5-6 IT:H

Density
256 Mb
Maximum Clock Rate
166 MHz
Package
90VFBGA
Address Bus Width
14 Bit
Operating Supply Voltage
1.8 V
Maximum Random Access Time
6.5|5 ns
Operating Temperature
-40 to 85 °C
Organization
8Mx32
Address Bus
14b
Access Time (max)
6.5/5ns
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
120mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
Figure 33: Write – DM Operation
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. H 11/09 EN
Command
BA0, BA1
Address
DQS
DQ
CK#
CKE
A10
DM
CK
6
t
t
IS
IS
NOP
T0
t
1
t
IH
IH
Notes:
t
t
ACTIVE
IS
Bank x
IS
Row
Row
T1
t
t
IH
IH
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4 in the case shown.
3. PRE = PRECHARGE.
4. Disable auto precharge.
5. Bank x at T8 is “Don’t Care” if A10 is HIGH at T8.
6. D
t
CK
these times.
t
t
IN
RCD
RAS
n = data-in from column n.
NOP
T2
1
t
CH
t
CL
t
WPRES
t
WRITE
IS
Bank x
Note 4
Col n
T3
t
IH
t
2
DQSS (NOM)
t
71
DS
NOP
T4
D
256Mb: x16, x32 Mobile LPDDR SDRAM
IN
t
WPRE
1
t
DH
T4n
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
DQSL
NOP
D
T5
IN
t
DQSH
1
T5n
t
WPST
NOP
T6
1
Don’t Care
©2008 Micron Technology, Inc. All rights reserved.
WRITE Operation
t
NOP
WR
T7
1
1
Transitioning Data
One bank
All banks
Bank x
PRE
T8
3
5
t
RP

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