HFIXF1110CC.B2 Q E000 Intel, HFIXF1110CC.B2 Q E000 Datasheet - Page 136

• Manufacturer Part Number: HFIXF1110CC.B2 Q E000
• Manufacturer: Intel

Specifications of HFIXF1110CC.B2 Q E000

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

Intel
07-Oct-2005
136
®
Table 69. FC Enable ($ Port_Index + 0x12)
Table 70. Discard Unknown Control Frame ($ Port_Index + 0x15)
Table 71. RX Config Word ($ Port_Index + 0x16) (Sheet 1 of 2)
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Register Description: Indicates which flow control mode is used for the RX and TX MAC.
Register Description: This register is used in the IXF1110 only for auto-negotiation. Register
bits 15:0 are the “config_word” received from the link partner, as described in IEEE 802.3, Sub
clause 37.2.1.
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
1. R = Read Only; CoR = Clear on Read; W = Write; R/W = Read/Write
1. R = Read Only; CoR = Clear on Read; W = Write; R/W = Read/Write
31:2
Bit
31:22
1
0
31:1
Bit
21
20
19
clear; R/W/C = Read/Write, Clear on Write
Bit
0
Name
Reserved
TX FDFC
RX FDFC
Reserved
An_complete
RX Sync
RX Config
Intel
Reserved
Discard Unknown
Control Frame
®
Name
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Name
Order Number: 250210, Revision: 009
Auto-negotiation complete. This bit remains cleared
from the time auto-negotiation is reset until auto-
negotiation reaches the “LINK_OK” state. It remains
set until auto-negotiation is disabled or restarted.
(This bit is only valid if auto-negotiation is enabled.)
0 = Loss of synchronization
1 = Bit synchronization (bit remains Low until register
0 = Receiving idle/data stream
1 = Receiving /C/ ordered sets
Reserved
0 = Keep unknown control frames
1 = Discard unknown control frames.
Description
Reserved
0 = Disable TX full-duplex flow control [the MAC
1 = Enable TX full-duplex flow control [enables
0 = Disable RX full-duplex flow control [the MAC
1 = Enable RX full-duplex flow control [MAC will
is read)
will not generate internally any flow control
frames based on the RX FIFO watermarks or
the Transmit Pause Control interface
the MAC to send flow control frames to the
link partner based on the RX FIFO
programmable watermarks or the Transmit
Pause Control interface]
will not respond to flow control frames sent to
it by the link partner]
respond to flow control frames sent by the link
partner and will stop packet transmission for
the time specified in the flow control frame]
Description
Description
Type
R/W
Type
R/W
R/W
R
Type
CoR
R
RO
R
R
1
1
1
0x00000007
0x00000000
0x00000000
0x00000000
Default
Default
Default
Datasheet
1
1
0
0
0
0