HFIXF1110CC.B2 Q E000 Intel, HFIXF1110CC.B2 Q E000 Datasheet - Page 53

• Manufacturer Part Number: HFIXF1110CC.B2 Q E000
• Manufacturer: Intel

Specifications of HFIXF1110CC.B2 Q E000

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

5.1.6
5.1.6.1
5.1.7
Datasheet
Note: In forced mode, the TX SPI4-2 status bus (TSTAT[1:0]) is held in the SATISFIED state until
Note: The Rx Sync bit indicates a loss of synchronization when the link is down.
If the link goes down after auto-negotiation is completed, RX_Sync indicates that a loss of
synchronization occurred. The IXF1110 restarts auto-negotiation and attempts to re-establish a
link. Once a link has been re-established, the AN_complete bit is set and the RX_sync bit shows
that synchronization has occurred.
To manually restart auto-negotiation, bit 5 of the
(AN_enable) must be de-asserted, then re-asserted.
Forced Mode Operation
The fiber operation of the MAC can be forced to operated at 1000 Mbps, full duplex without
completion of the auto negotiation function. In this mode, the receive path of the MAC must
achieve synchronization with the link partner. Once this has been achieved, the transmit path of the
MAC will be enabled to allow data transmission, which is known as “forced mode” operation.
Forced mode is limited to operation with a link partner that operates with a full-duplex link at a
speed of 1000 Mbps.
Forced mode is enabled by Register bit 5 (AN_enable) in the
0x18)”. By default, the IXF1110 is set to forced mode operation.
sync_status is OK. This prevents the TX FIFO from being filled prior to transmission of packets.
Determining If Link Is Established in Forced Mode
When the IXF1110 is in forced mode operation, the
20 RX Sync indicates when synchronization has occurred and valid link is established.
Jumbo Packet Support
The IXF1110 MAC supportss the concept of jumbo frames. The jumbo frame length is dependent
on the application, and the IXF1110 MAC design has been optimized for 9.6 KB jumbo frame
length. Lengths larger than this can be programmed, but will limit system performance.
The value programmed into the Max Frame Size Register (Addr: Port_Index + 0x0F) determines
the maximum length frame size the MAC can receive or transmit without activating any error
counters, and without truncation.
The Max Frame Size Register (Addr: Port_Index + 0x0F) bits 13:0 set the frame length. The
default value programmed into this register is 0x05EE (1518). The value is internally adjusted by
+4 if the frame has a VLAN tag. The overall programmable maximum is 0x3FFF or 16383 bytes.
The register should be programmed to 0x2667 for the 9.6 KB length jumbo frame for which the
IXF1110 MAC is optimized.
The RMON counters are also affected for jumbo frame support as follows:
RX Statistics:
•
•
RXOctetsTotalOK (Addr: Port_Index + 0x20)
RXPkts1519toMaxOctets (Addr: Port_Index + 0x2B)
Intel
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Order Number: 250210, Revision: 009
Intel
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
“Diverse Config ($ Port_Index + 0x18)”
“RX Config Word ($ Port_Index + 0x16)”
“Diverse Config ($ Port_Index +
07-Oct-2005
bit
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