HFIXF1110CC.B2 Q E000 Intel, HFIXF1110CC.B2 Q E000 Datasheet - Page 77

• Manufacturer Part Number: HFIXF1110CC.B2 Q E000
• Manufacturer: Intel

Specifications of HFIXF1110CC.B2 Q E000

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

5.4.4.1
Datasheet
General Description
In the IXF1110, the entire I
Registers (see
on page
The I
The I
The 4-bit Device ID field defaults to Ah, this value is compatible with standard fiber module based
on the Atmel Serial E
update this field with the appropriate value.
The 11-bit Register Address is split into two sub-fields:
Initiating an access where the 4-bit Port Address field to a value > 9h will not generate an I
access. Instead the Port Address Error will be set.
Initiating a write access where the Device ID field = Ah and the Register Address[10:8] = 0h will
generate an I
been initiated to the write protected optical module.
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Due to the single internal controller, only one optical module may be accessed at any one time.
Optical module accesses contains a single register Read. Since these register accesses will
most likely be done during power-up or discovery of a new module, these restrictions should
not affect normal operation.
The I
Port Address Error
Write Protect Error bit
No Acknowledge Error bit
I
I
Write Access Complete bit
Read DataValid bit
4-bit Port Address Select
Read/Write access select
4-bit Device ID
11-bit Register Address
8-bit Write Data
8-bit Read Data
Bits [10:8] must be set to 0h to be compatible with standard fiber optical module. Alternatively
these bits can be set to 1h - 7h to permit access to seven other I
Bits [7:0] specify the particular location to be accessed within the device specified by the
Device ID field and Register Address[10:8].
2
2
2
2
C Control Register is divided into the following sections:
C Enable bit
C Start Access bit
C Data Register is divided into the following sections:
178. The general operation is described below.
2
C interface also supports byte write accesses to the full address range.
Intel
2
C access. In addition the Write Protect Error bit will be set to indicate a write has
“I
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
2
C Control Ports 0-9 ($ 0x79B)” on page 177
2
Prom family. I
Order Number: 250210, Revision: 009
2
C interface is controlled through separate I
Intel
2
C accesses to non-Atmel compatible devices will require to
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
and
“I
2
C component on the same bus.
2
C Data Ports 0-9 ($ 0x79C)”
2
C Control and Data
07-Oct-2005
2
C
77