HFIXF1110CC.B2 Q E000 Intel, HFIXF1110CC.B2 Q E000 Datasheet - Page 63

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HFIXF1110CC.B2 Q E000

Manufacturer Part Number
HFIXF1110CC.B2 Q E000
Description
Manufacturer
Intel
Datasheet

Specifications of HFIXF1110CC.B2 Q E000

Number Of Transceivers
1
Screening Level
Commercial
Mounting
Surface Mount
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Lead Free Status / RoHS Status
Not Compliant
5.2.1.3
Datasheet
Figure 12. DIP-4 Calculation Boundaries
Note: EOP Abort packets sent out on the RX SPI4-2 may have the packet size modified. When an EOP
abort packet is received on the TX SPI4-2, the IXF1110 MAC sends the packet out to the SerDes
interface with an invalid CRC and is recorded in the TX statistics as a CRC error.
DIP4
Figure 12
computed. A functional description of calculating the DIP-4 code is given as follows. Assume that
the stream of 16-bit data words are arranged as shown in
time moving downward). (The first word received is at the top of the figure; the last word is at the
bottom of the figure.) The parity bits are generated by summing diagonally (in the control word,
the space occupied by the DIP-4 code (bits a, b, c, d) is set to all 1s during encoding). The first 16-
bit result is split into two bytes, which are added to each other modulo-2 to produce an 8-bit result.
The 8-bit result is then divided into two 4-bit nibbles, which are added to each other modulo-2 to
produce the final DIP-4 code. The procedure described applies to either parity generation on the Rx
path or to check parity on the Tx path.
Standard size (64-1518 byte) packets that are filtered
+
0x59F)”
Standard size (64-1518 byte) packets that are greater in size than the setting in the
Size ($ Port_Index + 0x0F)”
Frame Drop Enable ($
Jumbo frames that meet the filter conditions set in the
+ 0x19)” on page 139
RX FIFO overflows.
Packets received with /V/ error codes on the SerDes interface that are not dropped due to
settings in the
Runt Packets (under 64 bytes) received that are not dropped due to the setting in the
Errored Frame Drop Enable ($ 0x59F)” on page
0x19)”) but not dropped due to the setting in the
Payload
shows the range over which the Diagonal Interleaved Parity (DIP-4) parity bits are
Intel
(see
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Section 5.1.2.3, “Filtering of Receive Packets” on page
Control
“RX FIFO Errored Frame Drop Enable ($ 0x59F)” on page
Order Number: 250210, Revision: 009
or are above the
0x59F)”.
Control
and are not dropped due to the setting in the
Intel
DIP-4 Codewords
®
Control
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
“Max Frame Size ($ Port_Index + 0x0F)” on page
160.
“RX FIFO Errored Frame Drop Enable ($
(“RX Packet Filter Control ($ Port_Index
Figure 13
“RX Packet Filter Control ($ Port_Index
Payload
(MSB at the left most column,
45).
“RX FIFO Errored
160.
Control
“Max Frame
“RX FIFO
07-Oct-2005
A9039-01
135.
63

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