AM79C973BKC\W AMD (ADVANCED MICRO DEVICES), AM79C973BKC\W Datasheet - Page 148

• Manufacturer Part Number: AM79C973BKC\W
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKC\W

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3/3.135V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 160
• Lead Free Status / RoHS Status: Not Compliant

CSR61: Previous Transmit Descriptor Address
Upper
Bit
31-16 RES
15-0
CSR62: Previous Transmit Byte Count
Bit
31-16 RES
15-12 RES
11-0
CSR63: Previous Transmit Status
Bit
31-16 RES
15-0
148
PXDAU
PXBC
Name
PXST
Name
Name
Reserved locations. Written as
zeros and read as undefined.
Contains the upper 16 bits of the
previous transmit descriptor ad-
dress pointer. The Am79C973/
Am79C975 controller has the ca-
pability to stack multiple transmit
frames.
Reserved locations. Written as
zeros and read as undefined.
Reserved locations.
Previous Transmit Byte Count.
This field is a copy of the BCNT
field of TMD1 of the previous
transmit descriptor.
Description
Reserved locations. Written as
zeros and read as undefined.
Previous Transmit Status. This
field is a copy of bits 31-16 of
TMD1 of the previous transmit
descriptor.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
Description
P R E L I M I N A R Y
Am79C973/Am79C975
CSR64: Next Transmit Buffer Address Lower
Bit
31-16 RES
15-0
CSR65: Next Transmit Buffer Address Upper
Bit
31-16 RES
15-0
CSR66: Next Transmit Byte Count
Bit
31-16 RES
15-12 RES
11-0
NXBAL
NXBAU
Name
NXBC
Name
Name
Description
Reserved locations. Written as
zeros and read as undefined.
Contains the lower 16 bits of the
next transmit buffer address from
which the Am79C973/Am79C975
controller will transmit an outgo-
ing frame.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Reserved locations. Written as
zeros and read as undefined.
Contains the upper 16 bits of the
next transmit buffer address from
which the Am79C973/Am79C975
controller will transmit an outgo-
ing frame.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Reserved locations. Written as
zeros and read as undefined.
Reserved locations. Read and
written as zeros.
Next Transmit Byte Count. This
field is a copy of the BCNT field of
TMD1 of the next transmit de-
scriptor.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
Description