AM79C973BKC\W AMD (ADVANCED MICRO DEVICES), AM79C973BKC\W Datasheet - Page 165

• Manufacturer Part Number: AM79C973BKC\W
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKC\W

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3/3.135V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 160
• Lead Free Status / RoHS Status: Not Compliant

13
12
11-10 RES
9
8
LEDDIS
100E
MPSE
FDLSE
LED Disable. This bit is used to
disable the LED output. When
LEDDIS has the value 1, then the
LED output will always be dis-
abled. When LEDDIS has the val-
ue 0, then the LED output value
will be governed by the LEDOUT
and LEDPOL values.
100 Mbps Enable. When this bit
is set to 1, a value of 1 is passed
to the LEDOUT bit in this register
when the Am79C973/Am79C975
controller is operating at 100
Mbps mode.
Reserved locations. Written and
read as zeros.
Magic Packet Status Enable.
When this bit is set to 1, a value of
1 is passed to the LEDOUT bit in
this register when Magic Packet
frame mode is enabled and a
Magic Packet frame is detected
on the network.
Full-Duplex Link Status Enable.
Indicates the Full-Duplex Link
Test Status. When this bit is set,
a value of 1 is passed to the LED-
OUT signal when the Am79C973/
Am79C975 controller is function-
ing in a Link Pass state and full-
duplex operation is enabled.
When
Am79C975 controller is not func-
tioning in a Link Pass state with
full-duplex operation being en-
abled, a value of 0 is passed to
the LEDOUT signal.
Read/Write accessible always.
LEDDIS is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Read/Write accessible always.
100E is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Read/Write accessible always.
MPSE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Read/Write accessible always.
FDLSE is cleared by H_RESET
the
Am79C973/
P R E L I M I N A R Y
Am79C973/Am79C975
7
6
5
4
3
2
PSE
LNKSE
RCVME
XMTE
RES
RCVE
Receive Match Status Enable.
Receive Status Enable. When
and is not affected by S_RESET
or setting the STOP bit.
Pulse Stretcher Enable. When
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
Read/Write accessible always.
PSE is set to 1 by H_RESET and
is not affected by S_RESET or
setting the STOP bit.
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
when in Link Pass state.
Read/Write accessible always.
LNKSE is set to 1 by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
physical, logical filtering, broad-
cast and promiscuous.
Read/Write accessible always.
RCVME is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Transmit Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
Read/Write accessible always.
XMTE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Reserved location. Written and
read as zeros.
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
165