AM79C973BKC\W AMD (ADVANCED MICRO DEVICES), AM79C973BKC\W Datasheet - Page 248

• Manufacturer Part Number: AM79C973BKC\W
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKC\W

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3/3.135V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 160
• Lead Free Status / RoHS Status: Not Compliant

Key:
Note that the Am79C975 controller does not validate
the register address specified in the Write Byte com-
mand. A Write Byte command to a non-existing regis-
ter, or to register that is read-only, or to one of the
registers that require a Block Read or Write command
may cause unexpected reprogramming of an SMIU
register.
Read Byte Command
The Read Byte command is used to read 1 byte of data
from an SMIU register. This command is more complex
compared to the Write Byte command, since it involves
a change in the direction of the data transfer. The com-
mand starts with the START condition (S). The next 7
bits are the slave address of the Am79C975 controller,
followed by a 0 bit to indicate that the data transfer
starts with a write operation from the master to the
Am79C975 controller (W). The Am79C975 controller
Key:
Note: The Am79C975 controller does not validate the
register address specified in the Read Byte command.
A Read Byte command to a non-existing register, or to
register that is write-only, or to one of the registers that
require a Block Read or Write command will yield un-
defined data.
If the second slave address in the Read Byte Com-
mand is not the one of the Am79C975 controller, the
device will release the MDATA line to generate a NACK.
The master, receiving the NACK, must abort the cycle
by generating a STOP condition.
248
S
1
S
1
Slave Address
Master to Am79C975 controller
Am79C975 controller to Master
Master to Am79C975 controller
Am79C975 controller to Master
Slave Address
7
7
W A
1 1
MReg Address
W
1
A
1
8
Figure 72. Write Byte Command
Figure 73. Read Byte Command
P R E L I M I N A R Y
Am79C973/Am79C975
MReg Address
A S
1 1
8
Slave Address
must acknowledge the first byte by driving MDATA LOW
for 1 bit time (A). The next byte specifies the address of
the SMIU register (MReg) that is accessed, followed by
another ACK from the Am79C975 controller. The mas-
ter initiates the turn-around of the transfer direction by
asserting a repeated START condition, followed by the
repeated 7-bit slave address. This time, the Read/Write
bit is set to 1 to indicate that the next byte of data is
d r i ve n by th e A m 7 9 C 9 7 5 c o n tr o l l e r ( R) . T h e
Am79C975 controller acknowledges the transfer and
then drives the one byte of register data onto the
MDATA line. The acknowledge for the register data is
generated by the master, since he is the receiver of the
data. The master generates a NACK (N) to force the
Am79C975 controller to stop driving the MDATA line
since the data transfer consists of only one byte. The
Read Byte command terminates with the assertion of
the STOP condition (P) by the master.
Block Write Command
The Block Write command is used to write data to the
SMIU Transmit Data memory or to the Receive Pattern
RAM. The command starts with the START condition
(S). The next 7 bits are the slave address of the
Am79C975 controller, followed by a 0 bit to indicate a
write operation (W). The next byte specifies the ad-
dress of the SMIU register (MReg) that is accessed.
The address of the Receive Pattern RAM Data port
(34) or the address of the Transmit Data port (36) is the
only valid values for the MReg address. The third byte
7
A
1
R A
1 1
MReg Data
MReg Data
8
8
1
A
N P
1
P
1
1