XRT91L31IQTR-F Exar Corporation, XRT91L31IQTR-F Datasheet - Page 31

• Manufacturer Part Number: XRT91L31IQTR-F
• Description: SONET SDH - 8 Bit OC12/STM4, OC3/STM1 PHY Transceiver (with Improved Jitter Transfer Used For Loop Timing Applications)
• Manufacturer: Exar Corporation
• Type: Transceiverr

Specifications of XRT91L31IQTR-F

• Input: LVCMOS, LVPECL, LVTTL
• Output: LVCMOS, LVPECL, LVTTL
• Frequency - Max: 77.76MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.2
The serial remote loopback function is activated by setting RLOOPS "High". When serial remote loopback is
activated, the high-speed serial receive data from RXIP/N is presented at the high speed transmit output
TXOP/N, and the high-speed recovered clock is selected and presented to the high-speed transmit clock input
of the Retimer. During serial remote loopback, the high-speed receive data (RXIP/N) is also converted to
parallel data and presented at the low-speed receive parallel interface RXDO[7:0]. The recovered receive clock
is also divided by 8 and presented at the low-speed clock output RXPCLKO to synchronize the transfer of the
8-bit received parallel data. A simplified block diagram of serial remote loopback is shown in
F
The digital local loopback is activated when the DLOOP signal is set "High." When digital local loopback is
activated, the high-speed data from the output of the parallel to serial converter is looped back and presented
to the high-speed input of the receiver serial to parallel converter. The CMU output is also looped back to the
receive section and is used to synchronize the transfer of the data through the receiver. In Digital loopback
mode, the transmit data from the transmit parallel interface TXDI[7:0] is serialized and presented to the high-
speed transmit output TXOP/N using the high-speed 622.08/155.52 MHz transmit clock generated from the
clock multiplier unit and presented to the input of the Retimer and SIPO. A simplified block diagram of digital
loopback is shown in
F
4.0 DIAGNOSTIC FEATURES
4.1
4.2
IGURE
IGURE
18. S
19. D
Serial Remote Loopback
Rx Parallel Output
Digital Local Loopback
Rx Parallel Output
Tx Parallel Input
ERIAL
IGITAL
R
L
EMOTE
Figure
OCAL
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
L
Serial Remote Loopback
L
OOPBACK
19.
OOPBACK
Digital Loopback
PISO
SIPO
SIPO
PISO
31
Re-Timer
Re-Timer
CDR
CDR
Output Drivers
Input Drivers
Input Drivers
Output Drivers
LVPECL
LVPECL
LVPECL
LVPECL
Tx Serial Output
Rx Serial Input
Tx Serial Output
Figure
XRT91L31
18.