XRT91L31IQTR-F Exar Corporation, XRT91L31IQTR-F Datasheet - Page 7

• Manufacturer Part Number: XRT91L31IQTR-F
• Description: SONET SDH - 8 Bit OC12/STM4, OC3/STM1 PHY Transceiver (with Improved Jitter Transfer Used For Loop Timing Applications)
• Manufacturer: Exar Corporation
• Type: Transceiverr

Specifications of XRT91L31IQTR-F

• Input: LVCMOS, LVPECL, LVTTL
• Output: LVCMOS, LVPECL, LVTTL
• Frequency - Max: 77.76MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.2
PIN DESCRIPTION
CDRREFSEL
LOOPTIME
CDRDIS
N
AME
LVCMOS
LVCMOS
LVCMOS
LVTTL,
LVTTL,
LVTTL,
L
EVEL
T
YPE
I
I
I
P
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
60
12
2
IN
Clock and Data Recover Unit Reference Frequency Select
Selects the Clock and Data Recovery Unit reference frequency
based on the table below.
"Low" = CDR uses CMU’s reference clock
"High" = CDR reference clock from CDRAUXREF-
CLK
N
Loop Timing Mode
When the loop timing mode is activated the external reference
clock to the input of the Retimer is replaced with the high-speed
recovered receive clock from the CDR.
"Low" = Disabled
"High" = Loop timing Activated
Clock and Data Recovery Unit Disable
Active "High." Disables internal Clock and Data Recovery unit.
Received serial data bypasses the integrated CDR block.
RXINP/N is then sampled on the rising edge of externally
recovered differential clock XRXCLKIP/N coming from the opti-
cal module.
"Low" = Internal CDR unit is Enabled
"High" = Internal CDR unit is Disabled and Bypassed
OTE
7
CDRREF-
:
SEL
0
1
1
+ −
CDRAUXREFCLK requires accuracy of 77.76 MHz
200
ppm.
STS12/
STS3
0
1
CDR uses CMU’s reference clock
D
(see CMUFREQSEL pin)
ESCRIPTION
CLK Frequency
CDRAUXREF-
77.76 MHz
77.76 MHz
STS-12/STM-4
STS-3/STM-1
XRT91L31
155.52 Mbps
622.08 Mbps
Data Rate