SAF1562HL/N2-T NXP Semiconductors, SAF1562HL/N2-T Datasheet - Page 30
SAF1562HL/N2-T
Manufacturer Part Number
SAF1562HL/N2-T
Description
DC/DC Switching Controllers CONNECTIVITY CHIP
Manufacturer
NXP Semiconductors
Datasheet
1.SAF1562HLN2-T.pdf
(121 pages)
Specifications of SAF1562HL/N2-T
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Mounting Style
SMD/SMT
Package / Case
LQFP
Lead Free Status / RoHS Status
Compliant
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SAF1562
Product data sheet
8.2.3.5 PMCSR_BSE register
Table 36.
The PMCSR PCI-to-PCI Bridge Support Extensions (PMCSR_BSE) register supports PCI
bridge-specific functionality and is required for all PCI-to-PCI bridges. The bit allocation of
this register is given in
Table 37.
Address: Value read from address 34h + 6h
Bit
8
7 to 2
1 and 0
Bit
Symbol
Reset
Access
Address: Value read from address 34h + 4h
BPCC_EN B2_B3#
PMCSR - Power Management Control/Status register bit description
PMCSR_BSE - PMCSR PCI-to-PCI Bridge Support Extensions register bit
allocation
Symbol
PMEE
reserved
PS[1:0]
R
7
0
All information provided in this document is subject to legal disclaimers.
Description
PME Enabled: Logic 1 allows the function to assert PME#. When it is
logic 0, PME# assertion is disabled. This bit defaults to logic 0, if the
function does not support the PME# generation from D3
supports PME# from D3
cleared by the operating system each time the operating system is initially
loaded.
-
Power State: This two-bit field is used to determine the current power state
of the EHCI function and to set the function into a new power state. The
definition of the field values is given as:
00b — D0
01b — D1
10b — D2
11b — D3
If the software attempts to write an unsupported, optional state to this field,
the write operation must complete normally on the bus; however, the data
is discarded and no status change occurs.
Rev. 2 — 24 November 2010
Table
R
6
0
37.
hot
R
5
0
Hi-Speed Universal Serial Bus PCI Host Controller
cold
R
4
0
, then this bit is sticky and must be explicitly
R
3
0
reserved
R
2
0
SAF1562
© NXP B.V. 2010. All rights reserved.
cold
R
1
0
. If the function
…continued
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R
0
0
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