SAF1562HL/N2-T NXP Semiconductors, SAF1562HL/N2-T Datasheet - Page 60

• Manufacturer Part Number: SAF1562HL/N2-T
• Description: DC/DC Switching Controllers CONNECTIVITY CHIP
• Manufacturer: NXP Semiconductors

Specifications of SAF1562HL/N2-T

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
SAF1562
Product data sheet
Table 85.
Address: Content of the base address register + 54h
Bit
18
17
16
15 to 10 reserved
9
Symbol
PSSC
PESC
CSC
LSDA
HcRhPortStatus[4:1] - Host Controller Root Hub Port Status[4:1] register bit
description
All information provided in this document is subject to legal disclaimers.
Description
Port Suspend Status Change: This bit is set when the resume sequence
is completed. This sequence includes the 20 ms resume pulse, LS EOP
and 3 ms resynchronization delay. The HCD can write logic 1 to clear this
bit. Writing logic 0 has no effect. This bit is also cleared when
ResetStatusChange is set.
0 — Resume is not completed
1 — Resume is completed
Port Enable Status Change: This bit is set when hardware events cause
the PES (Port Enable Status) bit to be cleared. Changes from the HCD
writes do not set this bit. The HCD can write logic 1 to clear this bit. Writing
logic 0 has no effect.
0 — No change in PES
1 — Change in PES
Connect Status Change: This bit is set whenever a connect or disconnect
event occurs. The HCD can write logic 1 to clear this bit. Writing logic 0 has
no effect. If CCS (Current Connect Status) is cleared when a Set Port
Reset, Set Port Enable or Set Port Suspend write occurs, this bit is set to
force the driver to re-evaluate the connection status because these writes
should not occur if the port is disconnected.
0 — No change in CCS
1 — Change in CCS
Remark: If the Device Removable [NDP] bit is set, this bit is set only after a
Root Hub reset to inform the system that the device is attached.
-
On read—Low Speed Device Attached: This bit indicates the speed of the
device attached to this port. When set, a low-speed device is attached to
this port. When cleared, a full-speed device is attached to this port. This
field is valid only when CCS is set.
0 — Port is not suspended
1 — Port is suspended
On write—Clear Port Power: The HCD can clear the PPS (Por Power
Status) bit by writing logic 1 to this bit. Writing logic 0 has no effect.
Rev. 2 — 24 November 2010
…continued
Hi-Speed Universal Serial Bus PCI Host Controller
SAF1562
© NXP B.V. 2010. All rights reserved.
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