SAF1562HL/N2-T NXP Semiconductors, SAF1562HL/N2-T Datasheet - Page 46
SAF1562HL/N2-T
Manufacturer Part Number
SAF1562HL/N2-T
Description
DC/DC Switching Controllers CONNECTIVITY CHIP
Manufacturer
NXP Semiconductors
Datasheet
1.SAF1562HLN2-T.pdf
(121 pages)
Specifications of SAF1562HL/N2-T
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Mounting Style
SMD/SMT
Package / Case
LQFP
Lead Free Status / RoHS Status
Compliant
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SAF1562
Product data sheet
11.1.9 HcControlHeadED register
Table 56.
Address: Content of the base address register + 1Ch
Table 57.
Address: Content of the base address register + 1Ch
The HcControlHeadED register contains the physical address of the first ED of the control
list. The bit allocation is given in
Table 58.
Address: Content of the base address register + 20h
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 4
3 to 0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcPeriodCurrentED - Host Controller Period Current Endpoint Descriptor register
bit allocation
HcPeriodCurrentED - Host Controller Period Current Endpoint Descriptor register
bit description
HcControlHeadED - Host Controller Control Head Endpoint Descriptor register bit
allocation
Symbol
PCED[27:0]
reserved
31
23
15
31
23
R
R
R
R
R
R
0
0
0
7
0
0
0
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 24 November 2010
30
22
14
30
22
R
R
R
R
R
R
0
0
0
6
0
0
0
PCED[3:0]
Description
Period Current ED: This is used by the Host Controller to point to the
head of one of the periodic lists that must be processed in the current
frame. The content of this register is updated by the Host Controller
after a periodic ED is processed. The HCD may read the content in
determining which ED is being processed at the time of reading.
-
Table
29
21
13
29
21
R
R
R
R
R
R
0
0
0
5
0
0
0
Hi-Speed Universal Serial Bus PCI Host Controller
58.
28
20
12
28
CHED[27:20]
20
CHED[19:12]
PCED[27:20]
PCED[19:12]
R
R
R
R
R
R
0
0
0
4
0
0
0
PCED[11:4]
27
19
11
27
19
R
R
R
R
R
R
0
0
0
3
0
0
0
26
18
10
26
18
R
R
R
R
R
R
0
0
0
2
0
0
0
reserved
SAF1562
© NXP B.V. 2010. All rights reserved.
25
17
25
17
R
R
R
R
R
R
0
0
9
0
1
0
0
0
46 of 121
24
16
24
16
R
R
R
R
R
R
0
0
8
0
0
0
0
0
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