LSISAS1068 LSI, LSISAS1068 Datasheet - Page 150

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

system doorbell register
system interface
T
Ta
table BIR
table offset
target abort
TCK 3-12, 3-18,
TCK_ICE 3-12, 3-18,
TDI 3-12, 3-18,
TDI_ICE 3-12, 3-18,
TDIODE_P
TDIODE_VSS
TDO
TDO_ICE
temperature
test base address register
TestReset/
thermal resistance
timing
timing diagrams
Tj
TMS 3-12, 3-18,
TMS_ICE 3-12, 3-18,
TN
TN/
TRDY/ 3-5,
TRST/ 3-12,
TRST_ICE/ 3-12, 3-18,
TST_RST/ 3-11, 3-18,
TTL interrupt bit
TX[3:0]
TX[7:0]-
TX[7:0]+
IX-10
5-2
bus mastering function
doorbell
junction
operating free air
storage
external memory
interrupt output
PCI and PCI-X
power-up
reset
5-2
3-18
3-12
3-12
5-3
5-10
3-7
3-7
4-25
3-12
5-2
5-2
4-34
2-8
4-25
3-12
5-4
4-6
5-11
5-5
3-12
5-5
5-11
4-35
5-5
5-5
5-9
5-10
5-2
5-11
5-2
5-5
5-5
5-5
Index
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
5-5
5-5
4-32
2-16
4-35
U
Ultra320 SCSI
unexpected split completion bit
V
VDD_IO
VDDC
vendor ID register
version bit
voltage
W
wide port
write and invalidate enable bit
write I/O key 4-33, 4-34,
write sequence register 4-33, 4-34,
Z
ZCR 2-24,
ZCR_EN/ 2-24, 3-6,
zero channel RAID 2-24,
functional description
analog
core
I/O
supply
5-2
5-2
5-2
5-2
2-18
5-2
5-2
4-18
2-25
4-3
3-18
2-17
4-36
2-25
4-4
4-30
4-36