LSISAS1068 LSI, LSISAS1068 Datasheet - Page 95

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

31
x
x
x
x
x
x
x
Register: 0xXX
MSI-X Table Offset
Read Only
Table 4.3
PCI Configuration Space Register Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
x
x
x
x
x
BIR Field Definitions
Function Mask
Setting this bit masks all of the reset vectors that are
associated with the function. This bit overrides the per-
vector mask bit settings. Clearing this bit enables the per-
vector mask bit to determine if a vector is masked.
Reserved
This field is reserved.
Table Size
Host software reads this field to determine the MSI-X
table size.
MSI-X Table Offset
This field provides an offset from the address held in the
base address registers of the device to the base of the
MSI-X table.
Table BIR
This field indicates which of the base address registers of
the device, which are located at 0x10 in PCI Configura-
tion Space, maps the MSI-X table into memory.
provides the BIR field definitions.
x
BIR Value
0
1
2
3
4
5
6
7
MSI-X Table Offset
x
x
16 15
x
x
x
Base Address Register
0x10
0x14
0x18
0x1C
0x20
0x24
Reserved
Reserved
x
x
x
x
x
8
x
7
x
x
x
x
x
Table 4.3
x
[13:11]
[10:0]
[31:3]
x
[2:0]
4-25
14
0
x