LSISAS1068 LSI, LSISAS1068 Datasheet - Page 92

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

4-22
31
31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register: 0xXX
MSI Message Lower Address
Read/Write
Register: 0xXX
MSI Message Upper Address
Read/Write
PCI Host Register Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
24 23
0
0
0
0
0
0
0
0
0
0
MSI Message Upper Address
MSI Message Address
This register contains message address bits [31:2] for the
MSI memory write transaction. The host system specifies
and Dword aligns the message address. During the
address phase, the LSISAS1068 drives Message
Address[1:0] to 0b00.
Reserved
This field is reserved.
MSI Message Upper Address
The LSISAS1068 supports 64-bit MSI message. This
register contains the upper 32 bits of the 64-bit message
address, which the system specifies. The host system
software can program this register to 0x0000 to force the
PCI function to generate 32-bit message addresses.
0
0
MSI Message Address
0
0
0
0
16 15
16 15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
0
8
0
7
0
7
0
0
0
0
0
0
0
0
0
0
0
[31:2]
[31:0]
[1:0]
0
0
0
0
0
0