LSISAS1068 LSI, LSISAS1068 Datasheet - Page 58

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LSISAS1068

Manufacturer Part Number
LSISAS1068
Description
Manufacturer
LSI
Datasheet

Specifications of LSISAS1068

Lead Free Status / RoHS Status
Not Compliant

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3.2.6
Table 3.6
3.3
Table 3.7
3-6
Signal Name
INTA/
Signal Name
ALT_INTA/
ALT_GNT/
ZCR_EN/
BZR_SET
BZVDD
PCI-Related Signals
PCI Interrupt Signals
PCI Interrupt Signals
PCI-Related Signals
BGA Position Type
Y1
BGA Position Type
U5
AA1
W1
V21
AA26
Table 3.6
Table 3.7
Signal Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
describes the PCI interrupt signals.
describes the PCI-related signals.
O
O
I
I
Description
Refer to the PCI Local Bus Specification, Version 3.0, and
the PCI-X Addendum to the PCI Local Bus Specification,
Version 2.0, for complete signal descriptions.
Description
The PCI device asserts active LOW Alternate Interrupt
A to request service from the host device driver. This
signal is disabled when ZCR is disabled. ALT_INTA/ is an
open drain signal.
The interrupt request routing mode bits, bits [9:8] in the
PCI
interrupt signals to INTA/ and/or ALT_INTA/.
Active LOW Alternate Grant signal provides a grant
signal for ZCR implementations.
The active LOW ZCR enable input configures the
LSISAS1068 for Zero Channel RAID operation. When this
input is asserted, the standard PCI signals INTA/ and
GNT/ are not used, and the alternate signals ALT_INTA/
and ALT_GNT/ are used. When this input is deasserted,
the chip is configured for standard PCI operation.
This signal provides the reference resistor node for the
PCI-X impedance controller.
This signal provides the reference resistor node for the
PCI-X impedance controller.
Host Interrupt Mask
register, control the routing of

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