LSISAS1068 LSI, LSISAS1068 Datasheet - Page 51

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

Figure 2.7
Note: To maintain proper interrupt mapping, select the address line for use as IDSEL on the LSISAS1068 to be +2
2.7
Host System
IDSEL (A26)
AD21 (B29)
ZCR PCI
GNT/ (A17)
Int C/ (A7)
Int D/ (B8)
Int A/ (A6)
Int B/ (B7)
Slot
TDI (A4)
address lines above IDSEL on ZCR slot.
AD21
AD19
Int A/
Int B/
Int C/
Int D/
Universal Asynchronous Receiver/Transmitter (UART)
ZCR Circuit Diagram for the LSISAS1068
Vdd
Vdd
0.1 k
4.7 k
The LSISAS1068 provides an industry standard UART interface. The
UART performs serial-to-parallel conversion on data characters received
from a peripheral device or modem, and parallel-to-serial conversion on
data characters received from the CPU. The CPU has access to UART
status at any time during functional operation. The status information
includes the type and condition of the transfer operations being
performed by the UART, and any error conditions such as parity, overrun,
framing, or break interrupt.
The LSISAS1068 UART is compatible with the standard 16550 UART,
with the following exceptions:
Universal Asynchronous Receiver/Transmitter (UART)
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
Uses speed sense logic to automatically determine the speed of a
connected modem.
Vdd
4.7 k
Vdd
220
0.1 k
ALT_INTA/
ZCR_EN/
ALT_GNT/
IDSEL
LSISAS1068
2-25