MT29C4G48MAZAPAKD-5 IT Micron Technology Inc, MT29C4G48MAZAPAKD-5 IT Datasheet - Page 171

• Manufacturer Part Number: MT29C4G48MAZAPAKD-5 IT
• Description: MICMT29C4G48MAZAPAKD-5_IT 4G+2G MCP
• Manufacturer: Micron Technology Inc

Figure 112: Alternate Initialization with CKE LOW
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
Command
V
V
CK#
CKE
DDQ
CK
DD
1
LOW level
LVCMOS
Notes:
Power up: V
NOP
T = 200µs
2
(
(
(
(
(
)
(
)
)
)
)
(
)
(
)
)
(
(
(
(
(
(
)
(
)
(
)
)
)
)
)
)
1. PRE = PRECHARGE command; LMR = LOAD MODE REGISTER command; AR = AUTO RE-
2. NOP or DESELECT commands are required for at least 200μs.
3. Other valid commands are possible.
DD
and CK stable
t IS
t IS
FRESH command; ACT = ACTIVE command.
NOP
T0
t IH
t CH
t CL
PRE
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
T1
(
(
(
(
)
(
)
(
)
)
)
)
(
(
(
(
)
(
)
(
)
)
)
)
AR
Ta0
171
(
(
(
(
)
(
)
(
)
)
)
)
(
(
(
(
)
(
)
(
)
)
)
)
Tb0
AR
Micron Technology, Inc. reserves the right to change products or specifications without notice.
(
(
(
(
)
(
)
(
)
)
)
)
(
(
(
(
)
(
)
(
)
)
)
)
LMR
Tc0
(
(
(
(
)
(
)
(
)
)
)
)
(
(
(
(
)
(
)
(
)
)
)
)
LMR
Td0
© 2009 Micron Technology, Inc. All rights reserved.
(
(
(
)
)
)
(
(
(
)
)
)
(
(
(
(
)
(
)
(
)
)
)
)
ACT
Te0
Initialization
3
(
(
(
(
)
(
)
(
)
)
)
)
(
(
(
(
)
(
)
)
)
(
)
)
Don’t Care
NOP
Tf0
3