MT29C4G48MAZAPAKD-5 IT Micron Technology Inc, MT29C4G48MAZAPAKD-5 IT Datasheet - Page 183

• Manufacturer Part Number: MT29C4G48MAZAPAKD-5 IT
• Description: MICMT29C4G48MAZAPAKD-5_IT 4G+2G MCP
• Manufacturer: Micron Technology Inc

Figure 119: Consecutive READ Bursts
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
Command
Command
Address
Address
DQS
DQS
CK#
CK#
DQ
DQ
CK
CK
Notes:
READ
Bank,
READ
Bank,
Col n
Col n
T0
T0
1. D
2. BL = 4, 8, or 16 (if 4, the bursts are concatenated; if 8 or 16, the second burst interrupts
3. Shown with nominal
4. Example applies only when READ commands are issued to same device.
the first).
OUT
n (or b) = data-out from column n (or column b).
CL = 2
NOP
NOP
T1
T1
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
CL = 3
T1n
D
t
READ
READ
Bank,
OUT
n
Bank,
Col b
Col b
AC,
T2
1
T2
183
t
DQSCK, and
D
n + 1
T2n
T2n
OUT
D
D
n + 2
OUT
n
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NOP
NOP
T3
T3
OUT
t
DQSQ.
D
n + 1
Don’t Care
T3n
D
n + 3
T3n
OUT
OUT
D
n + 2
OUT
D
T4
NOP
T4
NOP
OUT
b
D
n + 3
T4n
T4n
OUT
D
b + 1
OUT
Transitioning Data
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READ Operation
D
T5
NOP
T5
NOP
D
b + 2
OUT
b
OUT
T5n
T5n
D
b + 1
D
b + 3
OUT
OUT