MT29C4G48MAZAPAKD-5 IT Micron Technology Inc, MT29C4G48MAZAPAKD-5 IT Datasheet - Page 184

• Manufacturer Part Number: MT29C4G48MAZAPAKD-5 IT
• Description: MICMT29C4G48MAZAPAKD-5_IT 4G+2G MCP
• Manufacturer: Micron Technology Inc

Figure 120: Nonconsecutive READ Bursts
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
Command
Command
Address
Address
DQS
DQS
CK#
CK#
DQ
DQ
CK
CK
Notes:
READ
Bank,
READ
Bank,
Col n
Col n
T0
T0
1. D
2. BL = 4, 8, or 16 (if burst is 8 or 16, the second burst interrupts the first).
3. Shown with nominal
4. Example applies when READ commands are issued to different devices or nonconsecu-
tive READs.
OUT
CL = 2
NOP
NOP
T1
T1
n (or b) = data-out from column n (or column b).
CL = 3
T1n
T1n
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
D
OUT
n
NOP
NOP
T2
1
T2
t
AC,
D
n + 1
OUT
T2n
T2n
184
t
DQSCK, and
D
D
n + 2
OUT
READ
Bank,
READ
Bank,
Col b
OUT
Col b
n
T3
T3
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D
n + 1
D
n + 3
t
T3n
T3n
OUT
DQSQ.
OUT
CL = 2
D
n + 2
T4
T4
NOP
NOP
OUT
Don’t Care
CL = 3
D
n + 3
T4n
T4n
OUT
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T5
T5
NOP
NOP
D
OUT
READ Operation
b
Transitioning Data
T5n
T5n
D
b + 1
OUT
T6
T6
NOP
NOP
D
D
b + 2
OUT
OUT
b