EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 22
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EP4SGX530HH35C2N
Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
7.EP4SGX530HH35C2N.pdf
(1145 pages)
Specifications of EP4SGX530HH35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Switching Characteristics
Switching Characteristics
Table 1–23. Transceiver Specifications for Stratix IV GX Devices (Part 1 of 9)
April 2011 Altera Corporation
Reference Clock
Supported I/O
Standards
Input frequency from
REFCLK input pins
Phase frequency
detector (CMU PLL and
receiver CDR)
Absolute V
REFCLK pin
Operational V
REFCLK pin
Absolute V
REFCLK pin
Rise/fall time
Duty cycle
Description
Symbol/
Transceiver Performance Specifications
MAX
MIN
MAX
f
for a
(21)
for a
for a
For more information about power estimation tools, refer to the
Estimator User Guide
Handbook.
This section provides performance characteristics of Stratix IV core and periphery
blocks for commercial grade devices.
These characteristics can be designated as Preliminary or Final.
■
■
This section describes transceiver performance specifications.
Table 1–23
Preliminary characteristics are created using simulation results, process data, and
other known parameters. The title of these tables show the designation as
“Preliminary”.
Final numbers are based on actual silicon characterization and testing. The
numbers reflect the actual performance of the device under worst-case silicon
process, voltage, and junction temperature conditions. There are no designations
on finalized tables.
Conditions
—
—
—
—
—
—
—
lists the Stratix IV GX transceiver specifications.
1.2 V PCML, 1.4 V PCML 1.5 V PCML, 2.5 V PCML, Differential LVPECL (3), LVDS, HCSL
and the
-0.4
Min
50
50
—
—
—
45
–2 Commercial
Speed Grade
Typ
PowerPlay Power Analysis
—
—
—
—
—
—
—
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
Max
697
425
1.6
1.5
0.2
—
55
Min
-0.4
Commercial/Industrial
50
50
—
—
—
45
Speed Grade
–2× Commercial
Typ
—
—
—
—
—
—
—
and
–3
chapter in the Quartus II
(1)
Max
697
325
1.6
1.5
0.2
—
55
PowerPlay Early Power
Commercial/Industrial
Min
-0.4
50
50
—
—
—
45
Speed Grade
Typ
—
—
—
—
—
—
—
–4
1–14
637.5
Max
325
1.6
1.5
0.2
—
55
MHz
MHz
Unit
UI
%
V
V
V