EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 31
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EP4SGX530HH35C2N
Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
7.EP4SGX530HH35C2N.pdf
(1145 pages)
Specifications of EP4SGX530HH35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Switching Characteristics
Figure 1–1. AC Gain Curves for Equalization Settings 0 to 15 (Bottom to Top)
Table 1–24. Transceiver Specifications for Stratix IV GT Devices (Part 1 of 8)
April 2011 Altera Corporation
Reference Clock
Supported I/O
Standards
Input frequency from
REFCLK input pins
Phase frequency
detector (CMU PLL
and receiver CDR)
Absolute V
REFCLK pin
Operational V
REFCLK pin
Absolute V
REFCLK pin
Rise/fall time
Description
Symbol/
MAX
MIN
MAX
for a
for a
for a
Figure 1–1
Table 1–24
Conditions
—
—
—
—
—
—
shows the top-to-bottom AC gain curve for equalization settings 0 to 15.
lists the Stratix IV GT transceiver specifications.
1.2 V PCML, 1.4 V PCML, 1.5 V PCML, 2.5 V PCML, Differential LVPECL (3), LVDS
–1 Industrial Speed Grade
Min
-0.3
50
50
—
—
—
Typ
—
—
—
—
—
—
706.25
Max
425
1.6
1.5
0.2
—
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
-0.3
Min
50
50
—
—
—
–2 Industrial Speed
Grade
Typ
—
—
—
—
—
—
706.25
Max
425
1.6
1.5
0.2
—
Min
-0.3
50
50
—
—
—
–3 Industrial Speed
Grade
Typ
—
—
—
—
—
—
706.25
Max
425
1.6
1.5
0.2
—
1–23
MHz
MHz
Unit
UI
V
V
V