PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 101

• Manufacturer Part Number: PNX1500E/G,557
• Description: IC MEDIA PROC 240MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.14 V ~ 1.26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1296; 935277746557; PNX1500E/G

NXP Semiconductors
Volume 1 of 1
10. Peripheral Interface
PNX15XX_PNX952X_SER_N_4
Product data sheet
10.1.1 Software I/O
10.1 GPIO - General Purpose Software I/O and Flexible Serial Interface
9.4 Fast General Purpose Output
The Fast General Purpose Output (FGPO) provides data generation capabilities that
match the FGPI:
PNX15xx/952x Series has 16 dedicated GPIO pins. In addition, 45 other pins that
have a high likelihood of not being used in certain applications are designated as
optional GPIO pins that can either operate in regular mode or in GPIO mode. As an
example, some of the data pins of the LAN module are available as fully functional
GPIO in case the system based on PNX15xx/952x Series is not connected to a LAN
network module. The complete list is available in the pin list where a dedicated
column defines the GPIO pin number, see
The GPIO module is connected to many pins. Hence it is the ideal place to provide
useful central system functions. It performs the following major functions, each
detailed below:
Each GPIO pin is a tri-state pin that can be individually enabled, disabled, written or
read. Pins are grouped in groups of 16 and signals within a group can be
simultaneously enabled and changed or observed. Changes can use a mask to allow
certain pins to remain unchanged.
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In combination with VDI_MODE[7] bit, see
basic Video In module by storing in memory at specific locations the different
lines and fields of the in-coming video data. Note that the YUV data is stored
consecutively in memory and not stored in three different planes.
generation of a structured data stream, indicating record and buffer start over two
control wires. Generated data can be 8-, 16- or 32-bit wide, with data rates up to
100 MHz at respectively 100, 200 and 400 MB/s.
message passing (8-, 16- or 32-bit wide)
External synchronization available
software I/O - set a pin or pin group, enable a pin (group), inspect pin values
precise timestamping of internal and external events (up to 12 signals
simultaneously)
signal event sequence monitoring or signal generation (up to 4 signals
simultaneously)
Rev. 4.0 — 03 December 2007
Section 2.3 on page
Section
PNX15xx/952x Series
9.1, FGPI can be used as a
Chapter 2: Overview
1-27.
© NXP B.V. 2007. All rights reserved.
2-101