PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 209
![IC MEDIA PROC 240MHZ 456-BGA](/photos/6/76/67605/568-456-bga_sot795-1_sml.jpg)
PNX1500E/G,557
Manufacturer Part Number
PNX1500E/G,557
Description
IC MEDIA PROC 240MHZ 456-BGA
Manufacturer
NXP Semiconductors
Specifications of PNX1500E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.14 V ~ 1.26 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1296
935277746557
PNX1500E/G
935277746557
PNX1500E/G
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Table 4: CAS Latency Related DDR SDRAM Timing Parameters
PNX15XX_PNX952X_SER_N_4
Product data sheet
Parameter
PRECHARGE_BIT
tCAS
Table 3: Default DDR SDRAM Timing Parameters
Parameter
tRCD read
tRCD write
tRRD
tMRD
tWTR
tWR
tRP
tRAS
tRFC
tRC
CAS_LATENCY = 3.0
8
6
3. Configure the MMI with default DDR SDRAM timing parameter settings that
support as many DRAM vendors as possible. It is recommended to verify these
default parameters comply with the DDR SDRAM devices used to build the
PNX15xx/952x Series system board. Not all the MMI parameters are initialized in
the boot scripts some are the reset defaults of the MMI module. The
summarizes the values of DDR SDRAM timing parameters once the
configurations of the MMI is completed by the boot. It is then the TM3260 or the
host CPU that is in charge to fine tune these parameters by re-programming the
MMI module according to the DDR SDRAM devices used on the PNX15xx/952x
Series system board. Furthermore ROW_WIDTH and COLUMN_WIDTH have
been set to 11 and 8, respectively, which allows the use of any kind of DDR
SDRAM densities and configurations during the boot process (i.e. in standalone
only 8 Kilobytes of data is written to memory). Finally, some parameters are
dependant on the CAS latency of the devices. After review of different DDR
SDRAM device datasheets, it is found that devices organized in x32 support, at
least, CAS latencies of 3.0. Similarly the devices organized in x16 support at
least a CAS latencies of 2.5. In addition to the CAS latencies the x32 and x16
devices require some different settings for the auto-precharge bit. Therefore
PNX15xx/952x Series BOOT_MODE[3] pin is also used to determine if a x32 or
x16 devices are used in the board system. This assumption is not bullet proof but
works for most of the DDR SDRAM vendors.The boot scripts assume a x32
device when CAS latency is 3.0 and a x16 device when the latency is 2.5.
Table 4
CAS_LATENCY.
shows the MMI parameters affected by the BOOT_MODE[3] pin, a.k.a.
Rev. 4.0 — 03 December 2007
CAS_LATENCY = 2.5
10
5
Value (Clocks)
4
4
4
4
1
3
4
9
15
13
PNX15xx/952x Series
Chapter 6: Boot Module
© NXP B.V. 2007. All rights reserved.
Table 3
6-209
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