PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 418
![IC MEDIA PROC 240MHZ 456-BGA](/photos/6/76/67605/568-456-bga_sot795-1_sml.jpg)
PNX1500E/G,557
Manufacturer Part Number
PNX1500E/G,557
Description
IC MEDIA PROC 240MHZ 456-BGA
Manufacturer
NXP Semiconductors
Specifications of PNX1500E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.14 V ~ 1.26 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1296
935277746557
PNX1500E/G
935277746557
PNX1500E/G
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NXP Semiconductors
Volume 1 of 1
Table 20: QVCP 1 Registers
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
Offset 0x10 E2C4
31:29
28:24
23:21
20:16
15:13
12:8
7:5
4:0
Offset 0x10 E2C8
31
27:16
15:12
Symbol
PF_SIZE_A[2:0]
PF_OFFS_A[4:0]
PF_SIZE_L[2:0]
PF_OFFS_L[4:0]
PF_SIZE_M[2:0]
PF_OFFS_M[4:0]
PF_SIZE_U[2:0]
PF_OFFS_U[4:0]
Enable
FlushCount
Unused
Variable Format register
Start Fetch
…Continued
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0x30h
-
Value
Rev. 4.0 — 03 December 2007
Description
Size component for alpha
Number of bits minus 1 (e.g. 7 => 8 bits per component)
Not available when PF_10B_MODE is on.
Offset component for alpha
Index of MSB position within 32-bit word (0-31)
Not available when PF_10B_MODE is on.
Size component for V or B
Number of bits minus 1 (e.g. 7 => 8 bits per component)
Not available when PF_10B_MODE is on.
Offset component for V or B
Index of MSB position within 32-bit word (0-31)
Not available when PF_10B_MODE is on.
Size component for U or G
Number of bits minus 1 (e.g. 7 => 8 bits per component)
Not available when PF_10B_MODE is on.
Offset component for U or G
Index of MSB position within 32-bit word (0-31)
Not available when PF_10B_MODE is on.
Size component for Y or R
Number of bits minus 1 (e.g. 7 => 8 bits per component)
Not available when PF_10B_MODE is on.
Offset component for Y or R
Index of MSB position within 32-bit word (0-31)
Not available when PF_10B_MODE is on.
Set this bit to delay the DMA data fetch timing until line number
specified in bit 11:0 is reached.
If disabled, DMA will pre-fetch data for the next field at the end of
current field.
The number of flush pixels to be inserted after the end of a field. If
Start Fetch is enabled this register must contain a large enough
value to flush all pixels out of the pipeline after the last pixel entered
the pixel formatter. (approx. 50)
PNX15xx/952x Series
Chapter 11: QVCP
© NXP B.V. 2007. All rights reserved.
11-418
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