PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 215
![IC MEDIA PROC 240MHZ 456-BGA](/photos/6/76/67605/568-456-bga_sot795-1_sml.jpg)
PNX1500E/G,557
Manufacturer Part Number
PNX1500E/G,557
Description
IC MEDIA PROC 240MHZ 456-BGA
Manufacturer
NXP Semiconductors
Specifications of PNX1500E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.14 V ~ 1.26 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1296
935277746557
PNX1500E/G
935277746557
PNX1500E/G
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PNX15XX_PNX952X_SER_N_4
Product data sheet
Figure 3:
0xFFFF,FFFF
BASE_10
DRAM_BASE
BASE_14
MMIO_BASE
0x0000,0000
BASE_18
XIO_BASE
System Memory Map and Block Diagram Configuration for PNX15xx/952x Series in Host-assisted
Mode
All set by the host BIOS
The PNX15xx/952x Series Boot system also provides a host-assisted boot script for
standalone board system (i.e. not a PCI plug-in card) that use PNX15xx/952x Series
in host-assisted mode. Since the PCI bus of this standalone board system is not
visible by the rest of the world it is possible to assign a default value and let the host
driver recognize a PNX15xx/952x Series system with the following IDs:
Table 9: Host Configuration Sequence
Finally on a PCI bus the sizes for all the apertures must be given an unique physical
addresses at PCI BIOS device enumeration time (DRAM, MMIO and XIO for the
PNX15xx/952x Series). This is the work of the host PCI BIOS driver.
Remark: The aperture sizes are written at boot time into the PCI module MMIO
registers. The host PCI BIOS software retrieves the values by a write, followed by a
read to the PCI Configuration space base address registers. It then assigns a suitable
value to each base address. Refer to [2], Section 6.2.5.1, “Address Maps” for more
details.
A typical simplified board system is sketched in
seen in the
apertures.
8-256 MB DRAM
Boot Script Content
0x1be4_0010
(0x7583<<10) | (dram_size<<7) | en_pci_arb
0x1be4_006c
0x0009_1131
8-128 MB XIO
2 MB MMIO
Figure 3
Rev. 4.0 — 03 December 2007
is an example of how the host BIOS can set the location of the
PCI Agent/Slave
RAM
Host CPU
Bridge
Flash
Comments
PCI Setup Register
Depends on GPIO[11:8]
PCI Subsystem ID is 0x0009
PCI Subsystem Vendor ID is 0x1131
Figure
PNX15xx/952x Series
PCI Agent/Slave
BOOT_MODE[7:0]
DDR SDRAM
3. The aperture allocation
PNX15xx/
Chapter 6: Boot Module
PCI-XIO Bus
PCI Agent/Slave
© NXP B.V. 2007. All rights reserved.
I2C
Boot
EEPROM
(Optional)
6-215
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