MPC8343VRAGDB Freescale Semiconductor, MPC8343VRAGDB Datasheet - Page 20

IC MPU POWERQUICC II 620-PBGA

MPC8343VRAGDB

Manufacturer Part Number
MPC8343VRAGDB
Description
IC MPU POWERQUICC II 620-PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheet

Specifications of MPC8343VRAGDB

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
620-PBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8349E-MITXE
Maximum Clock Frequency
400 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
400MHz
Embedded Interface Type
I2C, SPI, USB, UART
Digital Ic Case Style
BGA
No. Of Pins
620
Rohs Compliant
Yes
Family Name
MPC83xx
Device Core
PowerQUICC II Pro
Device Core Size
32b
Frequency (max)
400MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2V
Operating Supply Voltage (max)
1.26V
Operating Supply Voltage (min)
1.14V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
620
Package Type
BGA
For Use With
CWH-PPC-8343N-VX - KIT EVAL SYSTEM QUICCSTART 8248CWH-PPC-8343N-VE - EVALUATION SYSTEM QUICC MPC8343E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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DUART
Figure 6
Figure 7
7
This section describes the DC and AC electrical specifications for the DUART interface of the
MPC8343EA.
7.1
Table 21
20
High-level input voltage
Low-level input voltage
Input current (0.8 V ≤ V
ADDR/CMD/MODT
DUART
shows the DDR SDRAM output timing diagram.
provides the AC test load for the DDR bus.
provides the DC electrical characteristics for the DUART interface of the MPC8343EA.
DUART DC Electrical Characteristics
MDQS[n]
MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 10
MDQ[x]
MCK[n]
MCK[n]
IN
Output
≤ 2 V)
Parameter
Write A0
Figure 6. DDR SDRAM Output Timing Diagram
Table 21. DUART DC Electrical Characteristics
t
DDKHMP
t
DDKHAS
Figure 7. DDR AC Test Load
Z
t
0
MCK
= 50 Ω
t
,t
DDKHDX
DDKHCS
t
DDKHAX
NOOP
,t
t
D0
DDKHMH
DDKHCX
t
DDKHDS
Symbol
D1
V
V
I
R
IN
IH
IL
L
t
DDKLDS
= 50 Ω
t
DDKLDX
–0.3
Min
2
GV
DD
/2
Freescale Semiconductor
OV
DD
Max
0.8
±5
t
+ 0.3
DDKHME
Unit
μA
V
V

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