MPC8343VRAGDB Freescale Semiconductor, MPC8343VRAGDB Datasheet - Page 65

• Manufacturer Part Number: MPC8343VRAGDB
• Description: IC MPU POWERQUICC II 620-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8343VRAGDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 620-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8349E-MITXE
• Maximum Clock Frequency: 400 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 400MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 620
• Rohs Compliant: Yes
• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 620
• Package Type: BGA
• For Use With: CWH-PPC-8343N-VX - KIT EVAL SYSTEM QUICCSTART 8248CWH-PPC-8343N-VE - EVALUATION SYSTEM QUICC MPC8343E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
19.3
Table 58
is low at reset.
Freescale Semiconductor
No.
343
324
423
622
523
424
822
Ref
Core VCO frequency = core frequency × VCO divider. The VCO divider must be set properly so that the core VCO frequency
is in the range of 800–1800 MHz.
1
0–1
00
01
10
11
00
01
10
11
00
01
10
11
SPMF
0011
0011
0100
0110
0101
0100
1000
shows suggested PLL configurations for 33 and 66 MHz input clocks, when CFG_CLKIN_DIV
Suggested PLL Configurations
MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 10
RCWL
RCWL[COREPLL]
1000011
0100100
0100011
0100010
0100011
0100100
0100010
CORE
PLL
0010
0010
0010
0010
0010
0010
0010
0010
0011
0011
0011
0011
2–5
(MHz)
Clock
Input
Freq
33
33
33
33
33
33
33
Table 57. e300 Core PLL Configuration (continued)
266 MHz Device
2
Table 58. Suggested PLL Configurations
6
0
0
0
0
1
1
1
1
0
0
0
0
(MHz)
CSB
Freq
100
100
133
200
166
133
266
33 MHz CLKIN/PCI_CLK Options
(MHz)
Core
Freq
150
200
200
200
250
266
266
core_clk : csb_clk Ratio
(MHz)
Clock
Input
Freq
33
33
33
33
33
33
33
2.5:1
2.5:1
2.5:1
2.5:1
2:1
2:1
2:1
2:1
3:1
3:1
3:1
3:1
333 MHz Device
2
(MHz)
CSB
Freq
100
100
133
200
166
133
266
(MHz)
Core
Freq
150
200
200
200
250
266
266
(MHz)
Clock
Input
Freq
33
33
33
33
33
33
33
VCO Divider
400 MHz Device
2
2
4
8
8
2
4
8
8
2
4
8
8
(MHz)
Freq
CSB
100
100
133
200
166
133
266
1
(MHz)
Clocking
Core
Freq
150
200
200
200
250
266
266
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