MPC8343VRAGDB Freescale Semiconductor, MPC8343VRAGDB Datasheet - Page 63

• Manufacturer Part Number: MPC8343VRAGDB
• Description: IC MPU POWERQUICC II 620-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8343VRAGDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 620-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8349E-MITXE
• Maximum Clock Frequency: 400 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 400MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 620
• Rohs Compliant: Yes
• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 620
• Package Type: BGA
• For Use With: CWH-PPC-8343N-VX - KIT EVAL SYSTEM QUICCSTART 8248CWH-PPC-8343N-VE - EVALUATION SYSTEM QUICC MPC8343E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
2
DDR2 memory may be used at 133 MHz provided that the memory components are specified for operation at this frequency.
Freescale Semiconductor
CFG_CLKIN_DIV selects the ratio between CLKIN and PCI_SYNC_OUT.
CLKIN is the input clock in host mode; PCI_CLK is the input clock in agent mode.
CFG_CLKIN_DIV
CFG_CLKIN_DIV
at Reset
at Reset
High
High
High
High
High
High
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 10
1
1
Table 55. CSB Frequency Options for Host Mode (continued)
Table 56. CSB Frequency Options for Agent Mode
SPMF
SPMF
0010
0011
0100
0101
0110
0111
1000
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
0010
Input Clock Ratio
Input Clock Ratio
csb_clk :
csb_clk :
10 : 1
11 : 1
12 : 1
13 : 1
14 : 1
15 : 1
16 : 1
2 : 1
3 : 1
4 : 1
5 : 1
6 : 1
7 : 1
8 : 1
2 : 1
3 : 1
4 : 1
5 : 1
6 : 1
7 : 1
8 : 1
9 : 1
4 : 1
2
2
100
116
133
150
166
183
200
216
16.67
16.67
233
250
266
Input Clock Frequency (MHz)
Input Clock Frequency (MHz)
csb_clk Frequency (MHz)
csb_clk Frequency (MHz)
100
125
150
175
200
225
250
275
300
325
100
25
25
33.33
33.33
100
133
166
200
233
100
133
166
200
233
266
300
333
133
2
2
66.67
66.67
133
200
266
333
133
200
266
333
266
Clocking
63