MC68MH360EM25L Freescale Semiconductor, MC68MH360EM25L Datasheet - Page 793

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MC68MH360EM25L

Manufacturer Part Number
MC68MH360EM25L
Description
IC MPU QUICC ETHER 25MHZ 240FQFP
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68MH360EM25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

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Part Number:
MC68MH360EM25L
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MC68MH360EM25L
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Applications
The bit-banging pattern is created by writing and reading the array rows to the port as fast
as the CPU allows. The instructions to implement the shaded part of Figure 9-26 (indicated
by "repeat") are listed below. They are needed to perform one test clock cycle along with the
data signals. Assuming the output array address is located in address register A0, the input
array address is in address register A2, with the I/O port located at address A1 and the
length of the pattern in D0, one repeat cycle is as follows:
9-73
ROW NR
NOTES:
TMS
TDO
TCK
1. TCK rise and fall time
2. TMS, TDI data hold time
3. TMS, TDI data setup time
4. TCK to TDO valid
5. TCK cycle time
6. TCK pulse width
TDI
10
1
2
3
4
8
9
5
7
6
Figure 9-26. Bit Banging of Boundary Scan Pattern
M
T
S
0
0
0
0
0
0
1
1
0
0
6
1
1
D
0
0
0
T
0
0
0
0
0
I
Freescale Semiconductor, Inc.
For More Information On This Product,
5
0
1
0
T
C
K
1
1
0
1
1
0
0
4
MC68360 USER’S MANUAL
1
T
D
O
0
0
1
1
1
0
0
1
1
Go to: www.freescale.com
6
3
WRITE ROW NR 1
WRITE ROW NR 3
WRITE ROW NR 5
WRITE ROW NR 8
WRITE ROW NR 9
WRITE ROW NR 10
WRITE ROW NR 2
WRITE ROW NR 4
WRITE ROW NR 6
WRITE ROW NR 7
READ ROW NR 3
READ ROW NR 5
READ ROW NR 9
READ ROW NR 7
2
V
V
IH
IL
1
REPEAT
STABLE INPUT
OUTPUT VALID
MOTOROLA

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