PIC16F726-I/SP Microchip Technology Inc., PIC16F726-I/SP Datasheet - Page 111

• Manufacturer Part Number: PIC16F726-I/SP
• Description: 28 PIN, 14 KB FLASH, 1.8V-5.5V, 16 MHZ INT. OSC.
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F726-I/SP

• A/d Inputs: 11-Channel, 8-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Frequency: 20 MHz
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Resistance, Drain To Source On: Bytes
• Serial Interface: I2C, SPI, AUSART
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

11.0
The Timer0 module is an 8-bit timer/counter with the
following features:
• 8-bit timer/counter register (TMR0)
• 8-bit prescaler (shared with Watchdog Timer)
• Programmable internal or external clock source
• Programmable external clock edge selection
• Interrupt on overflow
• TMR0 can be used to gate Timer1
Figure 11-1 is a block diagram of the Timer0 module.
11.1
The Timer0 module can be used as either an 8-bit timer
or an 8-bit counter.
11.1.1
The Timer0 module will increment every instruction
cycle, if used without a prescaler. 8-Bit Timer mode is
selected by clearing the T0CS bit of the OPTION
register.
FIGURE 11-1:
© 2008 Microchip Technology Inc.
WDTE
Cap. Sensing
T1GSS = 11
TMR1GE
Oscillator
T0CKI
F
OSC
TIMER0 MODULE
Timer0 Operation
/4
8-BIT TIMER MODE
T0XCS
0
1
T0SE
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
Low-Power
WDT OSC
T0CS
0
1
Divide by
512
PSA
0
1
Preliminary
Prescaler
PIC16F72X/PIC16LF72X
8-bit
8
PS<2:0>
When TMR0 is written, the increment is inhibited for
two instruction cycles immediately following the write.
11.1.2
In 8-Bit Counter mode, the Timer0 module will increment
on every rising or falling edge of the T0CKI pin or the
Capacitive Sensing Oscillator (CPSOSC) signal.
8-Bit Counter Mode using the T0CKI pin is selected by
setting the T0CS bit in the OPTION register to '1' and
resetting the T0XCS bit in the CPSCON0 register to '0'.
8-Bit Counter Mode using the Capacitive Sensing
Oscillator (CPSOSC) signal is selected by setting the
T0CS bit in the OPTION register to '1' and setting the
T0XCS bit in the CPSCON0 register to '1'.
The rising or falling transition of the incrementing edge
for either input source is determined by the T0SE bit in
the OPTION register.
Note:
The value written to the TMR0 register can
be adjusted, in order to account for the two
instruction cycle delay when TMR0 is
written.
8-BIT COUNTER MODE
PSA
PSA
1
0
1
0
Time-out
2 T
Sync
WDT
CY
Set Flag bit T0IF
Overflow to Timer1
DS41341B-page 109
on Overflow
Data Bus
8
TMR0