PIC16F726-I/SP Microchip Technology Inc., PIC16F726-I/SP Datasheet - Page 34
PIC16F726-I/SP
Manufacturer Part Number
PIC16F726-I/SP
Description
28 PIN, 14 KB FLASH, 1.8V-5.5V, 16 MHZ INT. OSC.
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F726-ISP.pdf
(266 pages)
Specifications of PIC16F726-I/SP
A/d Inputs
11-Channel, 8-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Frequency
20 MHz
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
I2C, SPI, AUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC16F72X/PIC16LF72X
TABLE 3-1:
TABLE 3-2:
DS41341B-page 32
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during Sleep
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt Wake-up from Sleep
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’.
Note 1: When the wake-up is due to an interrupt and Global Enable bit (GIE) is set, the return address is pushed on
POR
0
0
0
1
1
1
1
1
2: If a Status bit is not implemented, that bit will be read as ‘0’.
the stack and PC is loaded with the interrupt vector (0004h) after execution of PC + 1.
BOR
x
x
x
0
1
1
1
1
STATUS BITS AND THEIR SIGNIFICANCE
RESET CONDITION FOR SPECIAL REGISTERS
TO
1
0
x
1
0
0
u
1
Condition
PD
1
x
0
1
1
0
u
0
Power-on Reset or LDO Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during Sleep or interrupt wake-up from Sleep
Preliminary
Program
PC + 1
Counter
PC + 1
0000h
0000h
0000h
0000h
0000h
Condition
(1)
(2)
0001 1xxx
000u uuuu
0001 0uuu
0000 1uuu
uuu0 0uuu
0001 1uuu
uuu1 0uuu
Register
STATUS
© 2008 Microchip Technology Inc.
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --u0
---- --uu
Register
PCON
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