PIC16F726-I/SP Microchip Technology Inc., PIC16F726-I/SP Datasheet - Page 162
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PIC16F726-I/SP
Manufacturer Part Number
PIC16F726-I/SP
Description
28 PIN, 14 KB FLASH, 1.8V-5.5V, 16 MHZ INT. OSC.
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F726-ISP.pdf
(266 pages)
Specifications of PIC16F726-I/SP
A/d Inputs
11-Channel, 8-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Frequency
20 MHz
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
I2C, SPI, AUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC16F72X/PIC16LF72X
FIGURE 16-8:
TABLE 16-7:
DS41341B-page 160
INTCON
PIE1
PIR1
RCREG
RCSTA
TRISC
TXSTA
Legend:
(SCKP = 0)
(SCKP = 1)
(Interrupt)
Note:
Name
TX/CK pin
TX/CK pin
SREN bit
CREN bit
bit SREN
RCIF bit
RXREG
RX/DT
Write to
Read
pin
x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used for Synchronous Master Reception.
AUSART Receive Data Register
Timing diagram demonstrates Synchronous Master mode with bit SREN = 1 and bit BRGH = 0.
TMR1GIE
‘0’
TMR1GIF
TRISC7
SPEN
CSRC
Bit 7
GIE
REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER RECEPTION
SYNCHRONOUS RECEPTION (MASTER MODE, SREN)
TRISC6
ADIE
Bit 6
PEIE
ADIF
RX9
TX9
bit 0
TRISC5
SREN
TXEN
RCIE
RCIF
Bit 5
T0IE
bit 1
TRISC4
CREN
SYNC
Bit 4
INTE
TXIE
TXIF
bit 2
Preliminary
TRISC3
ADDEN
SSPIE
SSPIF
RBIE
Bit 3
—
bit 3
CCP1IE
CCP1IF
TRISC2
BRGH
FERR
Bit 2
T0IF
bit 4
TMR2IE
TMR2IF
TRISC1
OERR
TRMT
INTF
Bit 1
bit 5
TMR1IE
TMR1IF
TRISC0
RX9D
TX9D
RBIF
Bit 0
© 2008 Microchip Technology Inc.
bit 6
0000 000x
0000 0000
0000 0000
0000 0000
0000 000X
1111 1111
0000 -010
POR, BOR
Value on
bit 7
0000 000x
0000 0000
0000 0000
0000 0000
0000 000X
1111 1111
0000 -010
Value on
all other
Resets
‘0’
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