PIC16F726-I/SP Microchip Technology Inc., PIC16F726-I/SP Datasheet - Page 169
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F726-I/SP
Manufacturer Part Number
PIC16F726-I/SP
Description
28 PIN, 14 KB FLASH, 1.8V-5.5V, 16 MHZ INT. OSC.
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F726-ISP.pdf
(266 pages)
Specifications of PIC16F726-I/SP
A/d Inputs
11-Channel, 8-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Frequency
20 MHz
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
I2C, SPI, AUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
- Current page: 169 of 266
- Download datasheet (5Mb)
17.1.1
In Master mode, data transfer can be initiated at any
time because the master controls the SCK line. Master
mode determines when the slave (Figure 17-1,
Processor 2) transmits data via control of the SCK line.
17.1.1.1
The SSP consists of a transmit/receive shift register
(SSPSR) and a buffer register (SSPBUF). The SSPSR
register shifts the data in and out of the device, MSb
first. The SSPBUF register holds the data that is written
out of the master until the received data is ready. Once
the eight bits of data have been received, the byte is
moved to the SSPBUF register. The Buffer Full Status
bit, BF of the SSPSTAT register, and the SSP Interrupt
Flag bit, SSPIF of the PIR1 register, are then set.
Any
transmission/reception of data will be ignored and the
Write Collision Detect bit, WCOL of the SSPCON
register, will be set. User software must clear the WCOL
bit so that it can be determined if the following write(s)
to the SSPBUF register completed successfully.
When the application software is expecting to receive
valid data, the SSPBUF should be read before the next
byte of data is written to the SSPBUF. The BF bit of the
SSPSTAT register is set when SSPBUF has been
loaded with the received data (transmission is
complete). When the SSPBUF is read, the BF bit is
cleared. This data may be irrelevant if the SPI is only a
transmitter. The SSP interrupt may be used to
determine
complete and the SSPBUF must be read and/or
written. If interrupts are not used, then software polling
can be done to ensure that a write collision does not
occur. Example 17-1 shows the loading of the SSPBUF
(SSPSR) for data transmission.
17.1.1.2
To enable the serial port, the SSPEN bit of the
SSPCON register, must be set. To reset or reconfigure
SPI mode, clear the SSPEN bit, re-initialize the
SSPCON register and then set the SSPEN bit. If a
Master mode of operation is selected in the SSPM bits
of the SSPCON register, the SDI, SDO and SCK pins
will be assigned as serial port pins.
For these pins to function as serial port pins, they must
have their corresponding data direction bits set or
cleared in the associated TRIS register as follows:
• SDI configured as input
• SDO configured as output
• SCK configured as output
© 2008 Microchip Technology Inc.
Note:
write
MASTER MODE
The SSPSR is not directly readable or
writable and can only be accessed by
addressing the SSPBUF register.
when
Master Mode Operation
Enabling Master I/O
to
the
the
SSPBUF
transmission/reception
register
during
Preliminary
is
PIC16F72X/PIC16LF72X
17.1.1.3
In Master mode, the data is transmitted/received as
soon as the SSPBUF register is loaded with a byte
value. If the master is only going to receive, SDO output
could be disabled (programmed and used as an input).
The SSPSR register will continue to shift in the signal
present on the SDI pin at the programmed clock rate.
When initializing SPI Master mode operation, several
options need to be specified. This is accomplished by
programming the appropriate control bits in the
SSPCON and SSPSTAT registers. These control bits
allow the following to be specified:
• SCK as clock output
• Idle state of SCK (CKP bit)
• Data input sample phase (SMP bit)
• Output data on rising/falling edge of SCK (CKE bit)
• Clock bit rate
In Master mode, the SPI clock rate (bit rate) is user
selectable to be one of the following:
• F
• F
• F
• (Timer2 output)/2
This allows a maximum data rate of 5 Mbps
(at F
Figure 17-3 shows the waveforms for Master mode.
The clock polarity is selected by appropriately program-
ming the CKP bit of the SSPCON register. When the
CKE bit is set, the SDO data is valid before there is a
clock edge on SCK. The sample time of the input data
is shown based on the state of the SMP bit and can
occur at the middle or end of the data output time. The
time when the SSPBUF is loaded with the received
data is shown.
17.1.1.4
In Master mode, all module clocks are halted and the
transmission/reception will remain in their current state,
paused, until the device wakes from Sleep. After the
device wakes up from Sleep, the module will continue
to transmit/receive data.
OSC
OSC
OSC
OSC
/4 (or TCY)
/16 (or 4 • TCY)
/64 (or 16 • TCY)
= 20 MHz).
Master Mode Setup
Sleep in Master Mode
DS41341B-page 167
Related parts for PIC16F726-I/SP
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![PIC16F72-I/SO](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
28 PIN, 3.5 KB FLASH, 128 RAM, 22 I/O
Manufacturer:
Microchip Technology Inc.
Datasheet:
![PIC16F72-I/SP](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
28 PIN, 3.5 KB FLASH, 128 RAM, 22 I/O
Manufacturer:
Microchip Technology Inc.
Datasheet:
![PIC16F1826-I/SO](/photos/6/76/67656/150-18-soic_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 32MHZ, SOIC-18
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1826-I/SS](/photos/6/81/68119/150-28-ssop_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 32MHZ, SSOP-20
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1826-I/P](/images/manufacturer_photos/0/4/439/microchip_technology_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 32MHZ, DIP-18
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1827-I/ML](/photos/6/81/68120/150-28-qfn_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1826-I/MV](/photos/12/13/121305/c04-152_mv_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1827-I/MV](/photos/12/13/121305/c04-152_mv_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1827-I/SS](/photos/6/81/68119/150-28-ssop_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 32MHZ, SSOP-20
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F727-E/P](/photos/6/61/66192/150-40-dip_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 20MHZ, DIP-40
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1827-I/MQ](/photos/18/99/189937/4243194_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F874-20/PQ](/photos/6/59/65984/150-44-pqfp_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 20MHZ, MQFP-44
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F690-E/ML](/photos/6/64/66481/c04-126_ml_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 20MHZ, QFN-20
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1826-I/MQ](/images/manufacturer_photos/0/4/439/microchip_technology_tmb.jpg)
Part Number:
Description:
IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
Manufacturer:
Microchip Technology
Datasheet:
![PIC16F1526-I/PT](/photos/16/3/160367/tqfp-64_tmb.jpg)
Part Number:
Description:
MCU 14KB FLASH 768B RAM 64-TQFP
Manufacturer:
Microchip Technology
Datasheet: