PIC16F726-I/SP Microchip Technology Inc., PIC16F726-I/SP Datasheet - Page 125
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PIC16F726-I/SP
Manufacturer Part Number
PIC16F726-I/SP
Description
28 PIN, 14 KB FLASH, 1.8V-5.5V, 16 MHZ INT. OSC.
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F726-ISP.pdf
(266 pages)
Specifications of PIC16F726-I/SP
A/d Inputs
11-Channel, 8-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Frequency
20 MHz
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
I2C, SPI, AUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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12.12 Timer1 Gate Control Register
The Timer1 Gate Control register (T1GCON), shown in
Register 12-2, is used to control Timer1 Gate.
REGISTER 12-2:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
TMR1GE
R/W-0
TMR1GE: Timer1 Gate Enable bit
If TMR1ON = 0:
This bit is ignored
If TMR1ON = 1:
1 = Timer1 counting is controlled by the Timer1 gate function
0 = Timer1 counts regardless of Timer1 gate function
T1GPOL: Timer1 Gate Polarity bit
1 = Timer1 gate is active-high (Timer1 counts when gate is high)
0 = Timer1 gate is active-low (Timer1 counts when gate is low)
T1GTM: Timer1 Gate Toggle Mode bit
1 = Timer1 Gate Toggle mode is enabled.
0 = Timer1 Gate Toggle mode is disabled and toggle flip flop is cleared
Timer1 gate flip flop toggles on every rising edge.
T1GSPM: Timer1 Gate Single Pulse Mode bit
1 = Timer1 gate Single-Pulse mode is enabled and is controlling Timer1 gate
0 = Timer1 gate Single-Pulse mode is disabled
T1GGO/DONE: Timer1 Gate Single-Pulse Acquisition Status bit
1 = Timer1 gate single-pulse acquisition is ready, waiting for an edge
0 = Timer1 gate single-pulse acquisition has completed or has not been started
This bit is automatically cleared when T1GSPM is cleared.
T1GVAL: Timer1 Gate Current State bit
Indicates the current state of the Timer1 gate that could be provided to TMR1H:TMR1L.
Unaffected by Timer1 Gate Enable (TMR1GE).
T1GSS<1:0>: Timer1 Gate Source Select bits
00 = Timer1 Gate pin
01 = Timer0 Overflow output
10 = TMR2 Match PR2 output
11 = Watchdog Timer scaler overflow
T1GPOL
R/W-0
Watchdog Timer oscillator is turned on if TMR1GE = 1, regardless of the state of TMR1ON
T1GCON: TIMER1 GATE CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
T1GTM
R/W-0
T1GSPM
R/W-0
Preliminary
PIC16F72X/PIC16LF72X
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
T1GGO/
R/W-0
DONE
T1GVAL
R-x
x = Bit is unknown
T1GSS1
R/W-0
DS41341B-page 123
T1GSS0
R/W-0
bit 0
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