DSP56002FC66 Freescale Semiconductor, DSP56002FC66 Datasheet - Page 3

DSP56002FC66

Manufacturer Part Number
DSP56002FC66
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of DSP56002FC66

Device Core Size
24b
Architecture
Harvard
Format
Fixed Point
Clock Freq (max)
66MHz
Mips
33
Device Input Clock Speed
66MHz
Ram Size
3KB
Program Memory Size
1.5KB
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSP56002FC66
Manufacturer:
MOTOROLA
Quantity:
5 530
Part Number:
DSP56002FC66
Manufacturer:
MOTOROLA
Quantity:
6 250
Part Number:
DSP56002FC66
Manufacturer:
MOTOROLA
Quantity:
591
Part Number:
DSP56002FC66
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
DSP56002FC661H72G
Manufacturer:
AD
Quantity:
92
FEATURES
Digital Signal Processing Core
Memory
MOTOROLA
• Efficient 24-bit DSP56000 core
• Up to 40 Million Instructions Per Second (MIPS), 25 ns instruction cycle at
• Up to 240 Million Operations Per Second (MOPS) at 80 MHz; up to 198 MOPS
• Performs a 1024-point complex Fast Fourier Transform (FFT) in 59,898 clocks
• Highly parallel instruction set with unique DSP addressing modes
• Two 56-bit accumulators including extension bits
• Parallel 24 24-bit multiply-accumulate in 1 instruction cycle (2 clock cycles)
• Double precision 48 48-bit multiply with 96-bit result in 6 instruction cycles
• 56-bit addition/subtraction in 1 instruction cycle
• Fractional and integer arithmetic with support for multiprecision arithmetic
• Hardware support for block-floating point FFT
• Hardware nested DO loops
• Zero-overhead fast interrupts (2 instruction cycles)
• Four 24-bit internal data buses and three 16-bit internal address buses for
• On-chip Harvard architecture permitting simultaneous accesses to program
• 512 24-bit on-chip Program RAM and 64 24-bit bootstrap ROM
• Two 256 24-bit on-chip data RAMs
• Two 256 24-bit on-chip data ROMs containing sine, A-law, and -law tables
• External memory expansion with 16-bit address and 24-bit data buses
• Bootstrap loading from external data bus, Host Interface, or Serial
80 MHz; up to 33 MIPS, 30.3 ns instruction cycle at 66 MHz
at 66 MHz
maximum information transfer on-chip
and two data memories
Communications Interface
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
DSP56002/D, Rev. 3
DSP56002
Features
iii

Related parts for DSP56002FC66