CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 109

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CN8236EBGB

Manufacturer Part Number
CN8236EBGB
Description
ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet

Specifications of CN8236EBGB

Package
388BGA
Traffic Class
ABR|CBR|GFR|UBR|VBR
Utopia Type
Level 1|Level 2
Host Interface
PCI
Maximum Data Rate
155 Mbps
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V

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CN8236
ATM ServiceSAR Plus with xBR Traffic Management
4.3.7 Segmentation Internal SRAM Memory Map
Table 4-26. Segmentation Internal SRAM Memory Map
28236-DSH-001-B
0x1400
0x1408
0x14F8
0x1500
0x1508
0x15F8
0x1600
0x1604
0x1608
0x160C
0x1610
0x1614
Address
0x14FF
0x15FF
0x1407
0x140F
0x1507
0x150F
0x1603
0x1607
0x160B
0x1613
0x1617
0x160F
Segmentation Status Queue Base Table Registers (SEG_SQ_QUn):
Internal Transmit Queue Base Table Registers (SEG_TQ_QUn):
SEG_SQ_QU0
SEG_SQ_QU1
SEG_SQ_QU31
SEG_TQ_QU0
SEG_TQ_QU1
SEG_TQ_QU31
AALx_AD2
AALx_AD0
AALx_AD1
AALx_AD3
AALx_AD4
AALx_AD5
Name
As indicated in
range 0x1400–0x1617.
address range 0x1400–0x14FF.
address range 0x1500–0x15FF.
0x1618–0x17FF.
The segmentation status queue base table registers (SEG_ST_QUn) are in the
The internal transmit queue base table registers (SEG_TQ_QUn) are in the
AALx registers are in the address range of 0x1600–0x1617.
Other internal segmentation and scheduler registers are in the address range
Mindspeed Technologies
Status Queue 0 Base Table
Status Queue 1 Base Table
Status Queue 31 Base Table
Transmit Queue 0 Base Table
Transmit Queue 1Base Table
Transmit Queue 31Base Table
PCI address for AALx 1 connected to HFIFOWR1
PCI address for AALx 2 connected to HFIFOWR2
PCI address for AALx 3 connected to HFIFOWR3
PCI address for AALx 4 connected to HFIFOWR4
PCI address for AALx 5 connected to HFIFOWR5
PCI address for AALx 0 connected to HFIFOWR0
Table
4-26, the segmentation internal SRAM is in the address
4.3 Segmentation Control and Data Structures
Description
4.0 Segmentation Coprocessor
4-31

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