CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 334

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CN8236EBGB

Manufacturer Part Number
CN8236EBGB
Description
ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet

Specifications of CN8236EBGB

Package
388BGA
Traffic Class
ABR|CBR|GFR|UBR|VBR
Utopia Type
Level 1|Level 2
Host Interface
PCI
Maximum Data Rate
155 Mbps
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V

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14.0 CN8236 Registers
14.4 Scheduler Registers
0xc0
The PCR_QUE_INT01 register fields are used to store the two lower PCR values used in PCR shaping on
priority queues that have been enabled for PCR shaping by setting the QPCR_ENAx bits in the SCH_PRI
register. QPCR_INTx values are used in order: 3, 2, 1, and 0; highest to lowest. PCR is determined by
1 / (QPCR_INTx
14.4.1 0xc4
The PCR_QUE_INT23 register fields are used to store the two highest PCR values used in PCR shaping on
priority queues that have been enabled for PCR shaping by setting the QPCR_ENAx bits in the SCH_PRI
register. QPCR_INTx values are used in order: 3, 2, 1, and 0; highest to lowest. PCR is determined by
1 / (QPCR_I24).
14-18
31–16
31–16
15–0
15–0
Bit
Bit
PCR Queue Interval 0 and 1 Register (PCR_QUE_INT01)
Field
Field
Size
Size
16
16
16
16
×
PCR Queue Interval 2 and 3 Register (PCR_QUE_INT23)
SYSCLK_period
QPCR_INT1
QPCR_INT0
QPCR_INT3
QPCR_INT2
Name
Name
×
SLOT_PER).
Mindspeed Technologies
The assigned PCR interval, entered as number of schedule table slots,
used to map to the 3rd-highest priority queue that is enabled for PCR
shaping (using the QPCR_ENAx bits in the SCH_PRI register).
The assigned PCR interval, entered as number of schedule table slots,
used to map to the 4th-highest priority queue that is enabled for PCR
shaping (using the QPCR_ENAx bits in the SCH_PRI register).
The assigned PCR interval, entered as number of schedule table slots,
used to map to the highest priority queue that is enabled for PCR shaping
(using the QPCR_ENAx bits in the SCH_PRI register).
The assigned PCR interval, entered as number of schedule table slots,
used to map to the 2nd-highest priority queue that is enabled for PCR
shaping (using the QPCR_ENAx bits in the SCH_PRI register).
ATM ServiceSAR Plus with xBR Traffic Management
Description
Description
28236-DSH-001-B
CN8236

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