MT90840AP Zarlink, MT90840AP Datasheet - Page 19

• Manufacturer Part Number: MT90840AP
• Description: Switch Fabric 512 x 2430/512 x 512/2.373K x 2.373K 5V 84-Pin PLCC Tube
• Manufacturer: Zarlink

Specifications of MT90840AP

• Package: 84PLCC
• Number Of Ports: 16
• Fabric Size: 512 x 2430|512 x 512|2.373K x 2.373K
• Switch Core: Non-Blocking
• Port Speed: 8.192|4.096|2.048 Mbps
• Operating Supply Voltage: 5 V

Timing Mode 4 (TM4) - Parallel Data Switching
Timing Mode 4 is used to provide switching of up to 2430 parallel input channels to the same number of parallel
output channels. Parallel TDM data is clocked in at PDi0-7 by PCKR, framed by PPFRi. Switching is performed as
programmed in the Tx Path Connection Memory, and data is output on PDo0-7, framed by PPFTo and clocked by
PCKR. See Figure 8 for connection details.
In TM4, PPFTo and PDo0-7 are offset (delayed) from PPFRi and PDi0-7 by a fixed 4 clock cycles (3.5 clock cycles
if the TCP bit is high). All the serial port data and timing signals, and PCKT, are unused in TM4. The internal clock
divider is used to generate an internal C4 clock to allow CPU reads from the RPDM. TM4 is only available for 19.44
and 16.384 Mbyte/s rates.
MT90840 Throughput Delay
In many isochronous applications it is important to know and/or limit the delay of data. Table 1 summarizes the data
throughput delay values for all timing modes of the MT90840. It is worth noting that the worst-case “round-trip”
delays are not as large as the sum of the worst-case delays on the individual links. This is shown by the last 5 rows
of Table 1, which give the delays for some representative two MT90840 setups.
MT90840 Per-channel Functions
Several functions of the MT90840 are programmable for each individual parallel channel or serial channel. Per-
channel functions on the parallel port side are programmed in the Transmit Path Connection Memory High (TPCM
High), and per-channel functions on the serial port interface are programmed in the Receive Path Connection
Memory High (RPCM High). On the parallel port these per-channel features are Bypass, Control Outputs, Output
Source
8 kHz
Source
8 kHz
Aligned
Frames
Parallel Data In
19.44 or 16.384 MHz (RX)
8
8
8 kHz REF
RX/TX Clock
Figure 7 - Timing Mode 3 Configuration
Figure 8 - Timing Mode 4 Configuration
8 kHz RX
8
PDi0-7
PDo0-7
PPFRi
PCKR
Zarlink Semiconductor Inc.
MT90840
CPU
MT90840
PCKR
PDi0-7
PPFRi
CPU
19
MT90840
STo0-7
SPCKo
STi0-7
F0o
PDo0-7
PPFTo
8
8
TX 8 kHz REF
Clock Reference
4.096 MHz
Parallel Data Out
8 kHz
STi/o 0-7
STi/o 0-7
8
ST-BUS
Components
Data Sheet