AT32UC3A3256AU Atmel Corporation, AT32UC3A3256AU Datasheet - Page 570

• Manufacturer Part Number: AT32UC3A3256AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3256AU

• Flash (kbytes): 256 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.6.7
32072G–11/2011
Modem Mode
Figure 25-36. Example of RTS Drive with Timeguard Enabled
The USART features a modem mode, supporting asynchronous communication with the follow-
ing signal pins: Data Terminal Ready (DTR), Data Set Ready (DSR), Request to Send (RTS),
Clear to Send (CTS), Data Carrier Detect (DCD), and Ring Indicator (RI). Writing 0x3 to
MR.MODE enables this mode, and the USART will behave as a Data Terminal Equipment
(DTE), controlling DTR and RTS, whilst detecting level changes on DSR, DCD, CTS, and RI.
Table 25-12
connections.
Table 25-12. Circuit References
The DTR pin is controlled by writing a one to the DTR enable and disable bits (DTREN,
DTRDIS) in CR. It is low when enabled, and high when disabled. The RTS pin is controlled
automatically.
Detected level changes can trigger interrupts, and are reported by the respective Input Change
bits (RIIC, DSRIC, DCDIC, and CTSIC) in CSR. These status bit are automatically cleared when
CSR is read. When the CTS pin goes high, the USART will wait for the transmitter to complete
any ongoing character transmission before automatically disabling it.
USART Pin
TXD
RTS
DTR
RXD
CTS
DSR
DCD
RI
shows USART signal pins with the corresponding standardized modem
Baud Rate
TXEMPTY
TXRDY
Clock
Write
V24
2
4
20
3
5
6
8
22
THR
TXD
RTS
Start
Bit
D0
D1
CCITT
103
105
108.2
104
106
107
109
125
D2
D3
D4
D5
D6
D7
Direction
From terminal to modem
From terminal to modem
From terminal to modem
From modem to terminal
From terminal to modem
From terminal to modem
From terminal to modem
From terminal to modem
Parity
Bit
Stop
Bit
TG = 4
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