AT32UC3A3256AU Atmel Corporation, AT32UC3A3256AU Datasheet - Page 823

• Manufacturer Part Number: AT32UC3A3256AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3256AU

• Flash (kbytes): 256 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

30.6.4
32072G–11/2011
Read/Write Operation
Consequent to MMC Specification 3.1, two types of multiple block read (or write) transactions
are defined (the host can use either one at any time):
The card will transfer (or program) the requested number of data blocks and terminate the trans-
action. The stop command is not required at the end of this type of multiple block read (or write),
unless terminated with an error. In order to start a multiple block read (or write) with pre-defined
block count, the host must correctly set the BLKR register. Otherwise the card will start an open-
ended multiple block read. The
(BLKR.BCNT)
this field corresponds to an infinite block transfer.
The following flowchart shows how to read a single block with or without use of DMA Controller
facilities. In this example (see
end of read. Similarly, the user can configure the IER register to trigger an interrupt at the end of
read.
• Open-ended/Infinite Multiple block read (or write):
• Multiple block read (or write) with pre-defined block count (since version 3.1 and higher):
The number of blocks for the read (or write) multiple block operation is not defined. The card
will continuously transfer (or program) data blocks until a stop transmission command is
received.
defines the number of blocks to transfer (from 1 to 65535 blocks). Writing zero to
Figure 30-10 on page
MMC/SDIO Block Count - SDIO Byte Count field in the BLKR register
824), a polling method is used to wait for the
823