AT90USB1286 Atmel Corporation, AT90USB1286 Datasheet - Page 169

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AT90USB1286

Manufacturer Part Number
AT90USB1286
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT90USB1286

Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
48
Ext Interrupts
16
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
10
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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15.10.1
7593K–AVR–11/09
General Timer/Counter Control Register – GTCCR
The clock source for Timer/Counter2 is named clk
system I/O clock clk
clocked from the TOSC1 pin. This enables use of Timer/Counter2 as a Real Time Counter
(RTC). When AS2 is set, pins TOSC1 and TOSC2 are disconnected from Port C. A crystal can
then be connected between the TOSC1 and TOSC2 pins to serve as an independent clock
source for Timer/Counter2. The Oscillator is optimized for use with a 32.768 kHz crystal. Apply-
ing an external clock source to TOSC1 is not recommended.
For Timer/Counter2, the possible prescaled selections are: clk
clk
Setting the PSRASY bit in GTCCR resets the prescaler. This allows the user to operate with a
predictable prescaler.
• Bit 1 – PSRASY: Prescaler Reset Timer/Counter2
When this bit is one, the Timer/Counter2 prescaler will be reset. This bit is normally cleared
immediately by hardware. If the bit is written when Timer/Counter2 is operating in asynchronous
mode, the bit will remain one until the prescaler has been reset. The bit will not be cleared by
hardware if the TSM bit is set. Refer to the description of the
Register – GTCCR” on page 99
Bit
Read/Write
Initial Value
T2S
/128, clk
7
TSM
R/W
0
T2S
/256, and clk
6
R
0
IO
. By setting the AS2 bit in ASSR, Timer/Counter2 is asynchronously
5
R
0
T2S
for a description of the Timer/Counter Synchronization mode.
/1024. Additionally, clk
4
R
0
3
R
0
T2S
. clk
T2S
2
R
0
T2S
as well as 0 (stop) may be selected.
is by default connected to the main
“General Timer/Counter Control
1
PSRA-
SY
R/W
0
AT90USB64/128
T2S
/8, clk
0
PSRSY
NC
R/W
0
T2S
/32, clk
GTCCR
T2S
/64,
169

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